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Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2017,7,31]]},"abstract":"<jats:p>In mobile computing systems, the limited amount of main memory space leads to page swap operation overhead and data duplication in both main memory and secondary storage. Furthermore, SQLite write operations in mobile devices such as smartphones and tablet PCs tend to frequently overwrite data to storage, significantly degrading performance. Thus, this article presents a unified memory-storage structure that is optimized for mobile devices and blurs the boundary between the existing main memory layer and secondary storage layer. This structure can eliminate the conventional page-swap operations that cause significant performance degradation and support fast program execution time. The unified memory-storage structure consists of a dynamic RAM (DRAM) and phase change memory (PCM) -based dual buffering module, a hybrid unified memory-storage array consisting of DRAM and NAND Flash memory, and an associated unified storage translation layer devised for the memory address and file translation mechanism as a system software module. This hybrid array of non-volatile memories is formed as a single memory-disk integrated storage space that can be logically divided into static and dynamic spaces. Experimental results show that the overall performance of the hybrid unified memory-storage system with the buffering structure increases by around 13% and power consumption is also improved by 35%, compared to current mobile system.<\/jats:p>","DOI":"10.1145\/3007650","type":"journal-article","created":{"date-parts":[[2017,4,21]],"date-time":"2017-04-21T12:51:10Z","timestamp":1492779070000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Mobile Unified Memory-Storage Structure Based on Hybrid Non-Volatile Memories"],"prefix":"10.1145","volume":"13","author":[{"given":"Su-Kyung","family":"Yoon","sequence":"first","affiliation":[{"name":"Yonsei University, Seoul, Korea"}]},{"given":"Young-Sun","family":"Youn","sequence":"additional","affiliation":[{"name":"Yonsei University, Seoul, Korea"}]},{"given":"Kihyun","family":"Park","sequence":"additional","affiliation":[{"name":"Yonsei University, Seoul, Korea"}]},{"given":"Shin-Dug","family":"Kim","sequence":"additional","affiliation":[{"name":"Yonsei University, Seoul, Korea"}]}],"member":"320","published-online":{"date-parts":[[2017,4,21]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523240"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2014.6849382"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950380"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630086"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2464996.2465005"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2014.7021234"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1450058.1450064"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2385603.2385607"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2009.2024163"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557176"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2380356.2380367"},{"volume-title":"Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA\u201909)","author":"Lee Benjamin C.","key":"e_1_2_1_12_1"},{"key":"e_1_2_1_13_1","article-title":"A new memory-disk integrated system with HW optimizer","volume":"12","author":"Lee Do-Heon","year":"2015","journal-title":"ACM Trans. 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