{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:44:46Z","timestamp":1773193486784,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":34,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,4,4]],"date-time":"2017-04-04T00:00:00Z","timestamp":1491264000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-1302260 CCF-1438992 CCF-1533885 CCF- 1617824"],"award-info":[{"award-number":["CNS-1302260 CCF-1438992 CCF-1533885 CCF- 1617824"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,4,4]]},"DOI":"10.1145\/3037697.3037715","type":"proceedings-article","created":{"date-parts":[[2017,4,5]],"date-time":"2017-04-05T08:47:40Z","timestamp":1491382060000},"page":"163-176","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Crossing Guard"],"prefix":"10.1145","author":[{"given":"Lena E.","family":"Olson","sequence":"first","affiliation":[{"name":"University of Wisconsin-Madison, Madison, WI, USA"}]},{"given":"Mark D.","family":"Hill","sequence":"additional","affiliation":[{"name":"University of Wisconsin-Madison, Madison, WI, USA"}]},{"given":"David A.","family":"Wood","sequence":"additional","affiliation":[{"name":"University of Wisconsin-Madison, Madison, WI, USA"}]}],"member":"320","published-online":{"date-parts":[[2017,4,4]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Cache Coherent Interconnect for Accelerators (CCIX). URL http:\/\/www.ccixconsortium.com\/.  Cache Coherent Interconnect for Accelerators (CCIX). URL http:\/\/www.ccixconsortium.com\/."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2003.1213087"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446089"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645534"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"e_1_3_2_1_7_1","unstructured":"E. M. Clarke O. Grumberg H. Hiraishi S. Jha D. E. Long K. L. McMillan and L. A. Ness. Verification of the Futurebus  E. M. Clarke O. Grumberg H. Hiraishi S. Jha D. E. Long K. L. McMillan and L. A. Ness. Verification of the Futurebus"},{"key":"e_1_3_2_1_8_1","first-page":"15","volume-title":"CHDL","year":"1993"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2008.4751884"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-61474-5_86"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.48"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346194"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"J. Goodacre. The evolution of the ARM architecture towards big data and the data-centre. http:\/\/virtical.upv.es\/pub\/sc13.pdf Nov. 2013. URL http:\/\/virtical.upv.es\/pub\/sc13.pdf.  J. Goodacre. The evolution of the ARM architecture towards big data and the data-centre. http:\/\/virtical.upv.es\/pub\/sc13.pdf Nov. 2013. URL http:\/\/virtical.upv.es\/pub\/sc13.pdf.","DOI":"10.1145\/2535800.2535921"},{"key":"e_1_3_2_1_14_1","unstructured":"E. E. Hagersten M. D. Hill and D. A. Wood. Methods and apparatus for a coherence transformer for connecting computer system coherence domains Jan. 12 1999. US Patent 5 860 109.  E. E. Hagersten M. D. Hill and D. A. Wood. Methods and apparatus for a coherence transformer for connecting computer system coherence domains Jan. 12 1999. US Patent 5 860 109."},{"key":"e_1_3_2_1_15_1","unstructured":"Coherent Accelerator Processor Interface User's Manual. IBM 2014.  Coherent Accelerator Processor Interface User's Manual. IBM 2014."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540748"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750421"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1994.288140"},{"key":"e_1_3_2_1_19_1","volume-title":"The First International Workshop on High Performance XML Processing. ACM","author":"Lunteren J. V.","year":"2004"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830782"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859640"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/96267.96279"},{"key":"e_1_3_2_1_23_1","first-page":"26","article-title":"Myriad 2: Eye of the computational vision storm","author":"Moloney D.","year":"2014","journal-title":"Hot Chips"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830819"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/237502.237573"},{"key":"e_1_3_2_1_26_1","first-page":"26","article-title":"Real-time ray-tracing chip for embedded applications","author":"Park W.-C.","year":"2014","journal-title":"Hot Chips"},{"key":"e_1_3_2_1_27_1","first-page":"26","article-title":"Next generation SPARC","author":"Phillips S.","year":"2014","journal-title":"Hot Chips"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2014.2299539"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540747"},{"key":"e_1_3_2_1_30_1","volume-title":"Proceedings of the 2012 45th Annual IEEE\/ACM International Symposium on Microarchitecture, MICRO-45","author":"Rajagopalan V.","year":"2013"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/545214.545229"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.5555\/2028905"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2014.2380198"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.57906"}],"event":{"name":"ASPLOS '17: Architectural Support for Programming Languages and Operating Systems","location":"Xi'an China","acronym":"ASPLOS '17","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3037697.3037715","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3037697.3037715","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3037697.3037715","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:50:27Z","timestamp":1750204227000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3037697.3037715"}},"subtitle":["Mediating Host-Accelerator Coherence Interactions"],"short-title":[],"issued":{"date-parts":[[2017,4,4]]},"references-count":34,"alternative-id":["10.1145\/3037697.3037715","10.1145\/3037697"],"URL":"https:\/\/doi.org\/10.1145\/3037697.3037715","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/3093336.3037715","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/3093337.3037715","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2017,4,4]]},"assertion":[{"value":"2017-04-04","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}