{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T08:36:18Z","timestamp":1777106178080,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":27,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,4,4]],"date-time":"2017-04-04T00:00:00Z","timestamp":1491264000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,4,4]]},"DOI":"10.1145\/3037697.3037736","type":"proceedings-article","created":{"date-parts":[[2017,4,5]],"date-time":"2017-04-05T08:47:40Z","timestamp":1491382060000},"page":"33-45","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":27,"title":["Mallacc"],"prefix":"10.1145","author":[{"given":"Svilen","family":"Kanev","sequence":"first","affiliation":[{"name":"Harvard Unirevsity, Cambridge, MA, USA"}]},{"given":"Sam Likun","family":"Xi","sequence":"additional","affiliation":[{"name":"Harvard Unirevsity, Cambridge, MA, USA"}]},{"given":"Gu-Yeon","family":"Wei","sequence":"additional","affiliation":[{"name":"Harvard Unirevsity, Cambridge, MA, USA"}]},{"given":"David","family":"Brooks","sequence":"additional","affiliation":[{"name":"Harvard Unirevsity, Cambridge, MA, USA"}]}],"member":"320","published-online":{"date-parts":[[2017,4,4]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379232"},{"key":"e_1_3_2_1_2_1","volume-title":"Communications of the ACM","author":"Borkar Shekhar","year":"2011","unstructured":"Shekhar Borkar and Andrew A Chien . The future of micro-processors . Communications of the ACM , 2011 . Shekhar Borkar and Andrew A Chien. The future of micro-processors. Communications of the ACM, 2011."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1999.808436"},{"key":"e_1_3_2_1_4_1","volume-title":"Transactions on Computers","author":"Morris Chang J.","year":"1996","unstructured":"J. Morris Chang and Edward F Gehringer . A high performance memory allocator for object-oriented systems . Transactions on Computers , 1996 . J. Morris Chang and Edward F Gehringer. A high performance memory allocator for object-oriented systems. Transactions on Computers, 1996."},{"key":"e_1_3_2_1_5_1","volume-title":"Computer Design (ICCD)","author":"Chang J Morris","year":"2000","unstructured":"J Morris Chang , Witawas Srisa-An , and C-TD Lo . Architectural support for dynamic memory management . In Computer Design (ICCD) , 2000 . J Morris Chang, Witawas Srisa-An, and C-TD Lo. Architectural support for dynamic memory management. In Computer Design (ICCD), 2000."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/366786.366802"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/512274.512288"},{"key":"e_1_3_2_1_8_1","volume-title":"Proceedings of the Technical BSD Conference","author":"Evans Jason","year":"2006","unstructured":"Jason Evans . A Scalable Concurrent malloc Implementation for FreeBSD . In Proceedings of the Technical BSD Conference , 2006 . Jason Evans. A Scalable Concurrent malloc Implementation for FreeBSD. In Proceedings of the Technical BSD Conference, 2006."},{"key":"e_1_3_2_1_9_1","volume-title":"Scalable memory allocation using jemalloc. https:\/\/goo.gl\/rvl2oK","author":"Evans Jason","year":"2011","unstructured":"Jason Evans . Scalable memory allocation using jemalloc. https:\/\/goo.gl\/rvl2oK , 2011 . Jason Evans. Scalable memory allocation using jemalloc. https:\/\/goo.gl\/rvl2oK, 2011."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/PDCAT.2011.18"},{"key":"e_1_3_2_1_11_1","unstructured":"Sanjay Ghemawat and Paul Menage. TCMalloc: Thread-caching malloc. http:\/\/goog-perftools.sourceforge.net\/doc\/tcmalloc.html 2007.  Sanjay Ghemawat and Paul Menage. TCMalloc: Thread-caching malloc. http:\/\/goog-perftools.sourceforge.net\/doc\/tcmalloc.html 2007."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750392"},{"key":"e_1_3_2_1_13_1","volume-title":"Low-power electronics and design (ISLPED)","author":"Kanev Svilen","year":"2012","unstructured":"Svilen Kanev , Gu-Yeon Wei , and David Brooks . XIOSim: power-performance modeling of mobile x86 cores . In Low-power electronics and design (ISLPED) , 2012 . Svilen Kanev, Gu-Yeon Wei, and David Brooks. XIOSim: power-performance modeling of mobile x86 cores. In Low-power electronics and design (ISLPED), 2012."},{"key":"e_1_3_2_1_14_1","volume-title":"A fast storage allocator. Communications of the ACM, 8(10)","author":"Knowlton Kenneth C.","year":"1965","unstructured":"Kenneth C. Knowlton . A fast storage allocator. Communications of the ACM, 8(10) , 1965 . Kenneth C. Knowlton. A fast storage allocator. Communications of the ACM, 8(10), 1965."},{"key":"e_1_3_2_1_15_1","volume-title":"Richard D Strong, Jay B Brockman, Dean M Tullsen, and Norman P Jouppi.","author":"Li Sheng","year":"2009","unstructured":"Sheng Li , Jung Ho Ahn , Richard D Strong, Jay B Brockman, Dean M Tullsen, and Norman P Jouppi. Mc PAT : an integrated power, area, and timing modeling framework for multicore and manycore architectures. In Microarchitecture (MICRO) , 2009 . Sheng Li, Jung Ho Ahn, Richard D Strong, Jay B Brockman, Dean M Tullsen, and Norman P Jouppi. McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In Microarchitecture (MICRO), 2009."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2006.13"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.03.003"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2168836.2168855"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.5555\/2665671.2665678"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485925"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.32"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2015.50"},{"key":"e_1_3_2_1_23_1","volume-title":"Computer architecture (ISCA)","author":"Sherwood Timothy","year":"2002","unstructured":"Timothy Sherwood , Erez Perelman , Greg Hamerly , and Brad Calder . Automatically characterizing large scale program behavior . In Computer architecture (ISCA) , 2002 . Timothy Sherwood, Erez Perelman, Greg Hamerly, and Brad Calder. Automatically characterizing large scale program behavior. In Computer architecture (ISCA), 2002."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/800217.806613"},{"key":"e_1_3_2_1_25_1","volume-title":"Journal of Solid-State Circuits (JSSC)","author":"Jeloka Supreet","year":"2016","unstructured":"Supreet Jeloka and Naveen Bharathwaj Akesh and Dennis Sylvester and David Blaauw . A 28nm Configurable Memory (TCAM\/BCAM\/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory. Journal of Solid-State Circuits (JSSC) , 2016 . Supreet Jeloka and Naveen Bharathwaj Akesh and Dennis Sylvester and David Blaauw. A 28nm Configurable Memory (TCAM\/BCAM\/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory. Journal of Solid-State Circuits (JSSC), 2016."},{"key":"e_1_3_2_1_26_1","volume-title":"Fast-fit: A new hierarchical dynamic storage allocation technique. Master's thesis","author":"Tadman M.","year":"1978","unstructured":"M. Tadman . Fast-fit: A new hierarchical dynamic storage allocation technique. Master's thesis , 1978 . M. Tadman. Fast-fit: A new hierarchical dynamic storage allocation technique. Master's thesis, 1978."},{"key":"e_1_3_2_1_27_1","volume-title":"David Boles. Dynamic Storage Allocation: A Survey and Critical Review. In International Workshop on Memory Management","author":"Wilson Paul R","year":"1995","unstructured":"Paul R Wilson , Mark S Johnston , Michael Neely , and David Boles. Dynamic Storage Allocation: A Survey and Critical Review. In International Workshop on Memory Management , 1995 . Paul R Wilson, Mark S Johnston, Michael Neely, and David Boles. Dynamic Storage Allocation: A Survey and Critical Review. In International Workshop on Memory Management, 1995."}],"event":{"name":"ASPLOS '17: Architectural Support for Programming Languages and Operating Systems","location":"Xi'an China","acronym":"ASPLOS '17","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3037697.3037736","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3037697.3037736","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:03:11Z","timestamp":1750201391000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3037697.3037736"}},"subtitle":["Accelerating Memory Allocation"],"short-title":[],"issued":{"date-parts":[[2017,4,4]]},"references-count":27,"alternative-id":["10.1145\/3037697.3037736","10.1145\/3037697"],"URL":"https:\/\/doi.org\/10.1145\/3037697.3037736","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/3093336.3037736","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/3093337.3037736","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2017,4,4]]},"assertion":[{"value":"2017-04-04","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}