{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T19:29:20Z","timestamp":1769282960356,"version":"3.49.0"},"reference-count":14,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2017,1,30]],"date-time":"2017-01-30T00:00:00Z","timestamp":1485734400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGOPS Oper. Syst. Rev."],"published-print":{"date-parts":[[2017,1,30]]},"abstract":"<jats:p>Hierarchical storage architectures are required to meet both, capacity and bandwidth requirements for future high-end storage architectures. In this paper we present the results of an evaluation of an emerging technology, DataDirect Networks' (DDN) Infinite Memory Engine (IME). IME allows to realize a fast buffer in front of a large capacity storage system. We collected benchmarking data with IOR and with the HPC application NEST. The IOR bandwidth results show how well network bandwidth towards such fast buffer can be exploited compared to the external storage system. The NEST benchmarks clearly demonstrate that IME can reduce I\/O-induced load imbalance between MPI ranks to a minimum while speeding up I\/O as a whole by a considerable factor. In addition to these direct measurements, a performance model for NEST is developed. In combination with a generic and abstract burst buffer architecture, this model generates predictions about appropriate burst buffer and I\/O parameters to achieve specific performance goals for NEST on HPC clusters of varying size. Specifically, it is investigated in which parameter range burst buffers are able to counteract the widening performance gap between compute and I\/O.<\/jats:p>","DOI":"10.1145\/3041710.3041714","type":"journal-article","created":{"date-parts":[[2017,2,1]],"date-time":"2017-02-01T17:15:10Z","timestamp":1485969310000},"page":"12-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":21,"title":["Evaluation and Performance Modeling of a Burst Buffer Solution"],"prefix":"10.1145","volume":"50","author":[{"given":"Wolfram","family":"Schenck","sequence":"first","affiliation":[{"name":"Faculty of Engineering and Mathematics, Bielefeld University of Applied Sciences, Bielefeld, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Salem","family":"El Sayed","sequence":"additional","affiliation":[{"name":"J\u00fclich Supercomputing Centre, Forschungszentrum J\u00fclich, J\u00fclich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Maciej","family":"Foszczynski","sequence":"additional","affiliation":[{"name":"J\u00fclich Supercomputing Centre, Forschungszentrum J\u00fclich, J\u00fclich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wilhelm","family":"Homberg","sequence":"additional","affiliation":[{"name":"J\u00fclich Supercomputing Centre, Forschungszentrum J\u00fclich, J\u00fclich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dirk","family":"Pleiter","sequence":"additional","affiliation":[{"name":"J\u00fclich Supercomputing Centre, Forschungszentrum J\u00fclich, J\u00fclich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2017,1,30]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1551609.1551618"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/HiPC.2015.24"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1654059.1654081"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2012.6232376"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/11602569_41"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2011.5937212"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1002\/cpe.1567"},{"key":"e_1_2_1_8_1","doi-asserted-by":"crossref","unstructured":"S.\n      El Sayed S.\n      Graf M.\n      Hennecke D.\n      Pleiter G.\n      Schwarz H.\n      Schick and \n      M.\n      Stephan\n  . \n  Using GPFS to manage NVRAM-based storage cache\n  . In J. M. Kunkel T. Ludwig and H. W. Meuer editors Supercomputing volume \n  7905\n   of \n  Lecture Notes in Computer Science pages \n  435\n  --\n  446\n  . \n  Springer Berlin Heidelberg 2013\n  .  S. El Sayed S. Graf M. Hennecke D. Pleiter G. Schwarz H. Schick and M. Stephan. Using GPFS to manage NVRAM-based storage cache. In J. M. Kunkel T. Ludwig and H. W. Meuer editors Supercomputing volume 7905 of Lecture Notes in Computer Science pages 435--446. Springer Berlin Heidelberg 2013.","DOI":"10.1007\/978-3-642-38750-0_33"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.4249\/scholarpedia.1430"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICDE.2000.839382"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2010.16"},{"key":"e_1_2_1_12_1","first-page":"1","volume-title":"SC '11","author":"Hoeer T.","year":"2011","unstructured":"T. Hoeer , W. Gropp , W. Kramer , and M. Snir . Performance Modeling for Systematic Performance Tuning. In State of the Practice Reports , SC '11 , pages 6: 1 -- 6 :12, New York, NY, USA , 2011 . ACM. T. Hoeer, W. Gropp, W. Kramer, and M. Snir. Performance Modeling for Systematic Performance Tuning. In State of the Practice Reports, SC '11, pages 6:1--6:12, New York, NY, USA, 2011. ACM."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2110205.2110209"},{"key":"e_1_2_1_14_1","unstructured":"S. Kunkel M. Schmidt J. M. Eppler H. E. Plesser G. Masumoto J. Igarashi S. Ishii T. Fukai A. Morrison M. Diesmann and M. Helias. Spiking network.  S. Kunkel M. Schmidt J. M. Eppler H. E. Plesser G. Masumoto J. Igarashi S. Ishii T. Fukai A. Morrison M. Diesmann and M. Helias. Spiking network."}],"container-title":["ACM SIGOPS Operating Systems Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3041710.3041714","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3041710.3041714","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:23:52Z","timestamp":1750220632000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3041710.3041714"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1,30]]},"references-count":14,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2017,1,30]]}},"alternative-id":["10.1145\/3041710.3041714"],"URL":"https:\/\/doi.org\/10.1145\/3041710.3041714","relation":{},"ISSN":["0163-5980"],"issn-type":[{"value":"0163-5980","type":"print"}],"subject":[],"published":{"date-parts":[[2017,1,30]]},"assertion":[{"value":"2017-01-30","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}