{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:07:28Z","timestamp":1750306048029,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":0,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,5,10]],"date-time":"2017-05-10T00:00:00Z","timestamp":1494374400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,5,10]]},"DOI":"10.1145\/3060403.3066860","type":"proceedings-article","created":{"date-parts":[[2017,5,16]],"date-time":"2017-05-16T19:56:07Z","timestamp":1494964567000},"page":"5-5","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["FPGAs in the Datacenter"],"prefix":"10.1145","author":[{"given":"Andrew","family":"Putnam","sequence":"first","affiliation":[{"name":"Microsoft, Redmond, WA, USA"}]}],"member":"320","published-online":{"date-parts":[[2017,5,10]]},"event":{"name":"GLSVLSI '17: Great Lakes Symposium on VLSI 2017","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"],"location":"Banff Alberta Canada","acronym":"GLSVLSI '17"},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2017"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3060403.3066860","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3060403.3066860","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:03:21Z","timestamp":1750215801000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3060403.3066860"}},"subtitle":["Combining the Worlds of Hardware and Software Development"],"short-title":[],"issued":{"date-parts":[[2017,5,10]]},"references-count":0,"alternative-id":["10.1145\/3060403.3066860","10.1145\/3060403"],"URL":"https:\/\/doi.org\/10.1145\/3060403.3066860","relation":{},"subject":[],"published":{"date-parts":[[2017,5,10]]},"assertion":[{"value":"2017-05-10","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}