{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T06:16:03Z","timestamp":1759385763809,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T00:00:00Z","timestamp":1497744000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1527320"],"award-info":[{"award-number":["1527320"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,6,18]]},"DOI":"10.1145\/3061639.3062192","type":"proceedings-article","created":{"date-parts":[[2017,6,13]],"date-time":"2017-06-13T12:18:42Z","timestamp":1497356322000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":24,"title":["A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology"],"prefix":"10.1145","author":[{"given":"Biying","family":"Xu","sequence":"first","affiliation":[{"name":"ECE Department, University of Texas at Austin, Austin, TX, USA"}]},{"given":"Shaolan","family":"Li","sequence":"additional","affiliation":[{"name":"ECE Department, University of Texas at Austin, Austin, TX, USA"}]},{"given":"Nan","family":"Sun","sequence":"additional","affiliation":[{"name":"ECE Department, University of Texas at Austin, Austin, TX, USA"}]},{"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[{"name":"ECE Department, University of Texas at Austin, Austin, TX, USA"}]}],"member":"320","published-online":{"date-parts":[[2017,6,18]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"\"International technology roadmap for semiconductors available at: http:\/\/www.itrs.net\/.\" \"International technology roadmap for semiconductors available at: http:\/\/www.itrs.net\/.\""},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917500"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2073193"},{"key":"e_1_3_2_1_4_1","first-page":"360","volume-title":"A 0.55 v 61db-snr 67db-sfdr 7mhz 4 th-order butterworth filter using ring-oscillator-based integrators in 90nm cmos,\" in IEEE International Solid-State Circuits Conference (ISSCC)","author":"Drost B.","year":"2012","unstructured":"B. Drost , M. Talegaonkar , and P. K. Hanumolu , \" A 0.55 v 61db-snr 67db-sfdr 7mhz 4 th-order butterworth filter using ring-oscillator-based integrators in 90nm cmos,\" in IEEE International Solid-State Circuits Conference (ISSCC) , 2012 , pp. 360 -- 362 . B. Drost, M. Talegaonkar, and P. K. Hanumolu, \"A 0.55 v 61db-snr 67db-sfdr 7mhz 4 th-order butterworth filter using ring-oscillator-based integrators in 90nm cmos,\" in IEEE International Solid-State Circuits Conference (ISSCC), 2012, pp. 360--362."},{"key":"e_1_3_2_1_5_1","first-page":"1","volume-title":"IEEE Custom Integrated Circuits Conf.","author":"Lee K.","year":"2013","unstructured":"K. Lee , Y. Yoon , and N. Sun , \" A 1.8 mw 2mhz-bw 66.5 db-sndr \u0394σ adc using vco-based integrators with intrinsic cla,\" in Proc . IEEE Custom Integrated Circuits Conf. , 2013 , pp. 1 -- 4 . K. Lee, Y. Yoon, and N. Sun, \"A 1.8 mw 2mhz-bw 66.5 db-sndr \u0394σ adc using vco-based integrators with intrinsic cla,\" in Proc. IEEE Custom Integrated Circuits Conf., 2013, pp. 1--4."},{"key":"e_1_3_2_1_6_1","first-page":"1","volume-title":"IEEE Custom Integrated Circuits Conf.","author":"Yoon Y.","year":"2015","unstructured":"Y. Yoon , K. Lee , S. Hong , X. Tang , L. Chen , and N. Sun , \" A 0.04-mm 2 0.9-mw 71-db sndr distributed modular \u0394σ adc with vco-based integrator and digital dac calibration,\" in Proc . IEEE Custom Integrated Circuits Conf. , 2015 , pp. 1 -- 4 . Y. Yoon, K. Lee, S. Hong, X. Tang, L. Chen, and N. Sun, \"A 0.04-mm 2 0.9-mw 71-db sndr distributed modular \u0394σ adc with vco-based integrator and digital dac calibration,\" in Proc. IEEE Custom Integrated Circuits Conf., 2015, pp. 1--4."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2456884"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.899053"},{"key":"e_1_3_2_1_9_1","volume-title":"Analog layout synthesis: a survey of topological approaches","author":"Graeb H. E.","year":"2010","unstructured":"H. E. Graeb , Analog layout synthesis: a survey of topological approaches . Springer Science & Business Media , 2010 . H. E. Graeb, Analog layout synthesis: a survey of topological approaches. Springer Science & Business Media, 2010."},{"key":"e_1_3_2_1_10_1","volume-title":"Analog layout generation for performance and manufacturability","author":"Lampaert K.","year":"2013","unstructured":"K. Lampaert , G. Gielen , and W. Sansen , Analog layout generation for performance and manufacturability . Springer Science & Business Media , 2013 , vol. 501 . K. Lampaert, G. Gielen, and W. Sansen, Analog layout generation for performance and manufacturability. Springer Science & Business Media, 2013, vol. 501."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","unstructured":"M. P.-H. Lin Y.-W. Chang and C.-M. Hung \"Recent research development and new challenges in analog layout synthesis \" in IEEE\/ACM Asia and South Pacific Design Automation Conference (ASPDAC) 2016 pp. 617--622. M. P.-H. Lin Y.-W. Chang and C.-M. Hung \"Recent research development and new challenges in analog layout synthesis \" in IEEE\/ACM Asia and South Pacific Design Automation Conference (ASPDAC) 2016 pp. 617--622.","DOI":"10.1109\/ASPDAC.2016.7428080"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2064490"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3036669.3036678"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2165068"},{"key":"e_1_3_2_1_15_1","first-page":"1","volume-title":"IEEE","author":"Waters A.","year":"2015","unstructured":"A. Waters and U.-K. Moon , \"A fully automated verilog-to-layout synthesized adc demonstrating 56db-sndr with 2mhz-bw,\" in IIEEE Asian Solid-State Circuits Conference (A-SSCC) . IEEE , 2015 , pp. 1 -- 4 . A. Waters and U.-K. Moon, \"A fully automated verilog-to-layout synthesized adc demonstrating 56db-sndr with 2mhz-bw,\" in IIEEE Asian Solid-State Circuits Conference (A-SSCC). IEEE, 2015, pp. 1--4."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2268571"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2168019"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2348311"},{"key":"e_1_3_2_1_19_1","first-page":"1","volume-title":"IEEE Custom Integrated Circuits Conf.","author":"Liu J.","year":"2015","unstructured":"J. Liu , A. Fahmy , T. Kim , and N. Maghari , \" A fully synthesized 0.4 v 77db sfdr reprogrammable srmc filter using digital standard cells,\" in Proc . IEEE Custom Integrated Circuits Conf. , 2015 , pp. 1 -- 4 . J. Liu, A. Fahmy, T. Kim, and N. Maghari, \"A fully synthesized 0.4 v 77db sfdr reprogrammable srmc filter using digital standard cells,\" in Proc. IEEE Custom Integrated Circuits Conf., 2015, pp. 1--4."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/49.761034"}],"event":{"name":"DAC '17: The 54th Annual Design Automation Conference 2017","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"Austin TX USA","acronym":"DAC '17"},"container-title":["Proceedings of the 54th Annual Design Automation Conference 2017"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3061639.3062192","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3061639.3062192","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3061639.3062192","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T14:29:08Z","timestamp":1750343348000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3061639.3062192"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,6,18]]},"references-count":20,"alternative-id":["10.1145\/3061639.3062192","10.1145\/3061639"],"URL":"https:\/\/doi.org\/10.1145\/3061639.3062192","relation":{},"subject":[],"published":{"date-parts":[[2017,6,18]]},"assertion":[{"value":"2017-06-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}