{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:07:30Z","timestamp":1750306050344,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":44,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,6,14]],"date-time":"2017-06-14T00:00:00Z","timestamp":1497398400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,6,14]]},"DOI":"10.1145\/3079079.3079101","type":"proceedings-article","created":{"date-parts":[[2017,5,31]],"date-time":"2017-05-31T19:31:40Z","timestamp":1496259100000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["libPRISM"],"prefix":"10.1145","author":[{"given":"Cristobal","family":"Ortega","sequence":"first","affiliation":[{"name":"Universitat Politecnica de Catalunya (UPC) and Barcelona Supercomputing Center (BSC-CNS)"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Miquel","family":"Moreto","sequence":"additional","affiliation":[{"name":"Universitat Politecnica de Catalunya (UPC) and Barcelona Supercomputing Center (BSC-CNS)"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marc","family":"Casas","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center (BSC-CNS)"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ramon","family":"Bertran","sequence":"additional","affiliation":[{"name":"IBM T.J. Watson Research Center"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alper","family":"Buyuktosunoglu","sequence":"additional","affiliation":[{"name":"IBM T.J. Watson Research Center"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexandre E.","family":"Eichenberger","sequence":"additional","affiliation":[{"name":"IBM T.J. Watson Research Center"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pradip","family":"Bose","sequence":"additional","affiliation":[{"name":"IBM T.J. Watson Research Center"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2017,6,14]]},"reference":[{"volume-title":"IPDPS'08","author":"Boneti C.","key":"e_1_3_2_1_1_1"},{"volume-title":"SC'08","author":"Boneti C.","key":"e_1_3_2_1_2_1"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.8"},{"key":"e_1_3_2_1_4_1","unstructured":"Casas M. etal Runtime-Aware Architectures. Euro-Par'15.  Casas M. et al. Runtime-Aware Architectures. Euro-Par'15."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.17"},{"volume-title":"Improving Memory Latency Aware Fetch Policies for SMT Processors. ISHPC'03","author":"Cazorla F.","key":"e_1_3_2_1_6_1"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.108"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/512529.512554"},{"key":"e_1_3_2_1_9_1","unstructured":"CORAL Benchmarks. Https:\/\/asc.llnl.gov\/coral-benchmarks\/.  CORAL Benchmarks. Https:\/\/asc.llnl.gov\/coral-benchmarks\/."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540737"},{"key":"e_1_3_2_1_11_1","unstructured":"de Melo A. C. The new linux perf tools. 2010.  de Melo A. C. The new linux perf tools. 2010."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669154"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000081"},{"volume-title":"HPCA'09","author":"Ebrahimi E.","key":"e_1_3_2_1_14_1"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346201"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1188455.1188543"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2015.48"},{"volume-title":"HPCA'15","author":"Feliu J.","key":"e_1_3_2_1_18_1"},{"key":"e_1_3_2_1_19_1","unstructured":"Floyd M. etal Adaptive energy-management features of the IBM POWER7 chip. 2015.  Floyd M. et al. Adaptive energy-management features of the IBM POWER7 chip. 2015."},{"key":"e_1_3_2_1_20_1","unstructured":"Hall B. etal Performance Optimization and Tuning Techniques for IBM Power Systems Processors Including IBM POWER8. 2015.  Hall B. et al. Performance Optimization and Tuning Techniques for IBM Power Systems Processors Including IBM POWER8. 2015."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/2612262.2612268"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.32"},{"volume-title":"PACT'16","author":"Jia Z.","key":"e_1_3_2_1_23_1"},{"volume-title":"HPCA'15","author":"Jimenez V.","key":"e_1_3_2_1_24_1"},{"volume-title":"PACT'12","author":"Jim\u00e9nez V.","key":"e_1_3_2_1_25_1"},{"key":"e_1_3_2_1_26_1","unstructured":"Jin H. etal The OpenMP implementation of NAS parallel benchmarks and its performance. 1999.  Jin H. et al. The OpenMP implementation of NAS parallel benchmarks and its performance. 1999."},{"volume-title":"ISPASS'14","author":"Khan M.","key":"e_1_3_2_1_27_1"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2442972"},{"volume-title":"CGO'04","author":"Luk C.","key":"e_1_3_2_1_29_1"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2014.71"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"crossref","unstructured":"Mericas A. etal IBM POWER8 performance features and evaluation. IBM Journal of Research and Development (2015).  Mericas A. et al. IBM POWER8 performance features and evaluation. IBM Journal of Research and Development (2015).","DOI":"10.1147\/JRD.2014.2380197"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.74"},{"volume-title":"IWOMP'12","author":"M\u00fcller M.","key":"e_1_3_2_1_33_1"},{"key":"e_1_3_2_1_34_1","unstructured":"OpenMP Architecture Review Board. OpenMP Application Program Interface Version 4.5.  OpenMP Architecture Review Board. OpenMP Application Program Interface Version 4.5."},{"key":"e_1_3_2_1_35_1","unstructured":"Prat D. etal Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7. CoRR'15.  Prat D. et al. Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7. CoRR'15."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379244"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2012.26"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.14529\/jsfi140102"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540727"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859663"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155672"},{"volume-title":"An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs. PDCS'04","author":"Zhang Y.","key":"e_1_3_2_1_42_1"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.386"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.5555\/1191544.1191706"}],"event":{"name":"ICS '17: 2017 International Conference on Supercomputing","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Chicago Illinois","acronym":"ICS '17"},"container-title":["Proceedings of the International Conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3079079.3079101","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3079079.3079101","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:03:25Z","timestamp":1750215805000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3079079.3079101"}},"subtitle":["an intelligent adaptation of prefetch and SMT levels"],"short-title":[],"issued":{"date-parts":[[2017,6,14]]},"references-count":44,"alternative-id":["10.1145\/3079079.3079101","10.1145\/3079079"],"URL":"https:\/\/doi.org\/10.1145\/3079079.3079101","relation":{},"subject":[],"published":{"date-parts":[[2017,6,14]]},"assertion":[{"value":"2017-06-14","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}