{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T13:16:53Z","timestamp":1762003013572,"version":"build-2065373602"},"reference-count":34,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2017,6,13]],"date-time":"2017-06-13T00:00:00Z","timestamp":1497312000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000015","name":"U.S. Department of Energy","doi-asserted-by":"publisher","award":["DE-AC02-05CH 11231"],"award-info":[{"award-number":["DE-AC02-05CH 11231"]}],"id":[{"id":"10.13039\/100000015","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["2016R1C1B2015312, 2015M3C4A7065645"],"award-info":[{"award-number":["2016R1C1B2015312, 2015M3C4A7065645"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003621","name":"Ministry of Science, ICT and Future Planning","doi-asserted-by":"publisher","award":["IITP-2017-2017-0-01015"],"award-info":[{"award-number":["IITP-2017-2017-0-01015"]}],"id":[{"id":"10.13039\/501100003621","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1302557, 1213052, 1439021, 1302225, 1629129, 1526750, 1629915"],"award-info":[{"award-number":["1302557, 1213052, 1439021, 1302225, 1629129, 1526750, 1629915"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Proc. ACM Meas. Anal. Comput. Syst."],"published-print":{"date-parts":[[2017,6,13]]},"abstract":"<jats:p>Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high-performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Among candidate solid-state nonvolatile memory technologies that could potentially be used to construct SCM, flash memory is a well-established technology and have been widely used in commercially available SCM incarnations. Flash-based SCM enables much better tradeoffs between performance, space and power than disk-based systems. However, write endurance is a significant challenge for a flash-based SCM (each act of writing a bit may slightly damage a cell, so one flash cell can be written 10^4-10^5 times, depending on the flash technology, before it becomes unusable). This is a well-documented problem and has received a lot of attention by manufactures that are using some combination of write reduction and wear-leveling techniques for achieving longer lifetime. In an effort to improve flash lifetime, first, by quantifying data longevity in an SCM, we show that a majority of the data stored in a solid-state SCM do not require long retention times provided by flash memory (i.e., up to 10 years in modern devices); second, by exploiting retention time relaxation, we propose a novel mechanism, called Dense-SLC (D-SLC), which enables us perform multiple writes into a cell during each erase cycle for lifetime extension; and finally, we discuss the required changes in the flash management software (FTL) in order to use D-SLC mechanism for extending the lifetime of the solid-state part of an SCM. Using an extensive simulation-based analysis of an SLC flash-based SCM, we demonstrate that D-SLC is able to significantly improve device lifetime (between 5.1X and 8.6X) with no performance overhead and also very small changes at the FTL software.<\/jats:p>","DOI":"10.1145\/3084458","type":"journal-article","created":{"date-parts":[[2018,3,23]],"date-time":"2018-03-23T18:28:08Z","timestamp":1521829688000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Exploiting Data Longevity for Enhancing the Lifetime of Flash-based Storage Class Memory"],"prefix":"10.1145","volume":"1","author":[{"given":"Wonil","family":"Choi","sequence":"first","affiliation":[{"name":"The Pennsylvania State University, University Park, PA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mohammad","family":"Arjomand","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University, University Park, PA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Myoungsoo","family":"Jung","sequence":"additional","affiliation":[{"name":"Yonsei University, Incheon, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mahmut","family":"Kandemir","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University, University Park, PA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2017,6,13]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Nitin Agrawal Vijayan Prabhakaran Ted Wobber John D. Davis Mark Manasse and Rina Panigrahy. 2008. Design Tradeoffs for SSD Performance. In USENIX ATC. http:\/\/www.microsoft.com\/en-us\/download\/details.aspx?id=52332.   Nitin Agrawal Vijayan Prabhakaran Ted Wobber John D. Davis Mark Manasse and Rina Panigrahy. 2008. Design Tradeoffs for SSD Performance. In USENIX ATC. http:\/\/www.microsoft.com\/en-us\/download\/details.aspx?id=52332."},{"key":"e_1_2_1_2_1","unstructured":"Frank Berry. 2015. 2015 Enterprise Flash Storage. In Flash Memory Summit  Frank Berry. 2015. 2015 Enterprise Flash Storage. In Flash Memory Summit"},{"key":"e_1_2_1_3_1","volume-title":"Ganger","author":"Bucy John S.","year":"2008","unstructured":"John S. Bucy , Jiri Schindler , Steven W. Schlosser , and Gregory R . Ganger . 2008 . The DiskSim Simulation Environment Version 4.0 Reference Manual. In Carnegie Mellon University-PDL- 08--101. http:\/\/www.pdl.cmu.edu\/DiskSim\/. John S. Bucy, Jiri Schindler, Steven W. Schlosser, and Gregory R. Ganger. 2008. The DiskSim Simulation Environment Version 4.0 Reference Manual. In Carnegie Mellon University-PDL-08--101. http:\/\/www.pdl.cmu.edu\/DiskSim\/."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0449"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.peva.2010.07.003"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.49"},{"key":"e_1_2_1_7_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Yixin Luo Erich F. Haratsch Ken Mai and Onur Mutlu. 2015. Data Retention in MLC NAND Flash Memory: Characterization Optimization and Recovery. In HPCA.  Yu Cai Yixin Luo Erich F. Haratsch Ken Mai and Onur Mutlu. 2015. Data Retention in MLC NAND Flash Memory: Characterization Optimization and Recovery. In HPCA.","DOI":"10.1109\/HPCA.2015.7056062"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2591971.2591994"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555349.1555371"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0439"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669118"},{"key":"e_1_2_1_12_1","volume-title":"Flash Technology: Annual Update. In Flash Memory Summit.","author":"Handy Jim","year":"2016","unstructured":"Jim Handy . 2016 . Flash Technology: Annual Update. In Flash Memory Summit. Jim Handy. 2016. Flash Technology: Annual Update. In Flash Memory Summit."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2465529.2465543"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.peva.2013.08.010"},{"key":"e_1_2_1_15_1","unstructured":"Jaeyong Jeong Sangwook Hahn Sungjin Lee and Jihong Kim. 2014. Lifetime Improvement of NAND Flash-based Storage Systems Using Dynamic Program and Erase Scaling. In USENIX FAST.   Jaeyong Jeong Sangwook Hahn Sungjin Lee and Jihong Kim. 2014. Lifetime Improvement of NAND Flash-based Storage Systems Using Dynamic Program and Erase Scaling. In USENIX FAST."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228406"},{"key":"e_1_2_1_17_1","unstructured":"Myoungsoo Jung and Mahmut Kandemir. 2012. An Evaluation of Different Page Allocation Strategies on High-Speed SSDs. In USENIX HotStorage.   Myoungsoo Jung and Mahmut Kandemir. 2012. An Evaluation of Different Page Allocation Strategies on High-Speed SSDs. In USENIX HotStorage."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2465529.2465548"},{"key":"e_1_2_1_19_1","doi-asserted-by":"crossref","unstructured":"Jae-Duk Lee Jeong-Hyuk Choi Donggun Park and Kinam Kim. 2003. Degradation of Tunnel Oxide by FN Current Stress and Its Effects on Data Retention Characteristics of 90-nm NAND Flash Memory. In IRPS.  Jae-Duk Lee Jeong-Hyuk Choi Donggun Park and Kinam Kim. 2003. Degradation of Tunnel Oxide by FN Current Stress and Its Effects on Data Retention Characteristics of 90-nm NAND Flash Memory. In IRPS.","DOI":"10.1109\/LED.2003.820645"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2465529.2465546"},{"key":"e_1_2_1_21_1","unstructured":"Ren-Shuo Liu Chia-Lin Yang and Wei Wu. 2012. Optimizing NAND Flash-Based SSDs via Retention Relaxation. In USENIX FAST.   Ren-Shuo Liu Chia-Lin Yang and Wei Wu. 2012. Optimizing NAND Flash-Based SSDs via Retention Relaxation. In USENIX FAST."},{"key":"e_1_2_1_22_1","volume-title":"WARM: Improving NAND Flash Memory Lifetime with Write-hotness Aware Retention Management. In MSST.","author":"Luo Yixin","year":"2015","unstructured":"Yixin Luo , Yu Cai , Saugata Ghose , Jongmoo Choi , and Onur Mutlu . 2015 . WARM: Improving NAND Flash Memory Lifetime with Write-hotness Aware Retention Management. In MSST. Yixin Luo, Yu Cai, Saugata Ghose, Jongmoo Choi, and Onur Mutlu. 2015. WARM: Improving NAND Flash Memory Lifetime with Write-hotness Aware Retention Management. In MSST."},{"key":"e_1_2_1_23_1","unstructured":"Fabio Margaglia Gala Yadgar Eitan Yaakobi Yue Li Assaf Schuster and Andre Brinkmann. 2016. The Devil Is in the Details: Implementing Flash Page Reuse with WOM Codes. In USENIX FAST.   Fabio Margaglia Gala Yadgar Eitan Yaakobi Yue Li Assaf Schuster and Andre Brinkmann. 2016. The Devil Is in the Details: Implementing Flash Page Reuse with WOM Codes. In USENIX FAST."},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2745844.2745848"},{"key":"e_1_2_1_25_1","unstructured":"Micron. 2014. NAND Flash Memory MT29F32G08ABAAA MT29F64G08AFAAA MT29F128G08A{J\/K\/M}AAA MT29F256G08AUAAA MT29F32G08ABCAB MT29F64G08AECAB MT29F128G08A{K\/M}CAB MT29F256G08AUCAB.  Micron. 2014. NAND Flash Memory MT29F32G08ABAAA MT29F64G08AFAAA MT29F128G08A{J\/K\/M}AAA MT29F256G08AUAAA MT29F32G08ABCAB MT29F64G08AECAB MT29F128G08A{K\/M}CAB MT29F256G08AUCAB."},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2004.836721"},{"key":"e_1_2_1_27_1","volume-title":"Austin Donnelly, and Antory Rowstron","author":"Narayanan Dushyanth","year":"2008","unstructured":"Dushyanth Narayanan , Austin Donnelly, and Antory Rowstron . 2008 . Write Off-Loading: Practical Power Management for Enterprise Storage. In USENIX FAST. http:\/\/iotta.snia.org\/traces\/388. Dushyanth Narayanan, Austin Donnelly, and Antory Rowstron. 2008. Write Off-Loading: Practical Power Management for Enterprise Storage. In USENIX FAST. http:\/\/iotta.snia.org\/traces\/388."},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168954"},{"key":"e_1_2_1_29_1","unstructured":"Thomas Parnell. 2016. NAND Flash Basics and Error Characteristics. In Flash Memory Summit.  Thomas Parnell. 2016. NAND Flash Basics and Error Characteristics. In Flash Memory Summit."},{"volume-title":"Phase Change Memory: From Devices to Systems","author":"Qureshi Moinuddin K.","key":"e_1_2_1_30_1","unstructured":"Moinuddin K. Qureshi , Sudhanva Gurumurthi , and Bipin Rajendran . 2011. Phase Change Memory: From Devices to Systems . Morgan & Claypool Publisher Moinuddin K. Qureshi, Sudhanva Gurumurthi, and Bipin Rajendran. 2011. Phase Change Memory: From Devices to Systems. Morgan & Claypool Publisher"},{"key":"e_1_2_1_31_1","volume-title":"Stan","author":"Smullen Clinton Wills","year":"2011","unstructured":"Clinton Wills Smullen , Vidyabhushan Mohan , Anurag Nigam , Sudhanva Gurumurthi , and Mircea R . Stan . 2011 . Relaxing Non-Volatility for Fast and Energy-Efficient STT-RAM Caches. In HPCA. Clinton Wills Smullen, Vidyabhushan Mohan, Anurag Nigam, Sudhanva Gurumurthi, and Mircea R. Stan. 2011. Relaxing Non-Volatility for Fast and Energy-Efficient STT-RAM Caches. In HPCA."},{"key":"e_1_2_1_32_1","volume-title":"Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, and Hyung-Kyu Lim.","author":"Suh KangDeug","year":"1995","unstructured":"KangDeug Suh , Byung-Hoon Suh , Young-Ho Lim , Jin-Ki Kim , Young-Joon Choi , Yong-Nam Koh , Sung Soo Lee , Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, and Hyung-Kyu Lim. 1995 . A 3.3V 32Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme. In ISSCC. KangDeug Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, and Hyung-Kyu Lim. 1995. A 3.3V 32Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme. In ISSCC."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.20"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357179"}],"container-title":["Proceedings of the ACM on Measurement and Analysis of Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3084458","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3084458","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3084458","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:30:22Z","timestamp":1750217422000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3084458"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,6,13]]},"references-count":34,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2017,6,13]]}},"alternative-id":["10.1145\/3084458"],"URL":"https:\/\/doi.org\/10.1145\/3084458","relation":{},"ISSN":["2476-1249"],"issn-type":[{"type":"electronic","value":"2476-1249"}],"subject":[],"published":{"date-parts":[[2017,6,13]]},"assertion":[{"value":"2017-06-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}