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Syst."],"published-print":{"date-parts":[[2018,1,31]]},"abstract":"<jats:p>As we enter an era witnessing the closer end of Dennard scaling, where further reduction in power supply-voltage to reduce power consumption becomes more challenging in conventional systems, a goal of developing a system capable of performing large computations with minimal area and power overheads needs more optimization aspects. A rigorous exploration of alternate computing techniques, which can mitigate the limitations of Complementary Metal-Oxide Semiconductor (CMOS) technology scaling and conventional Boolean systems, is imperative. Reflecting on these lines of thought, in this article we explore the potential of non-Boolean computing employing nano-oscillators for performing varied functions. We use a two coupled nano-oscillator as our basic computational model and propose an architecture for a non-Boolean coupled oscillator based co-processor capable of executing certain functions that are commonly used across a variety of approximate application domains. The proposed architecture includes an accuracy tunable knob, which can be tuned by the programmer at runtime. The functionality of the proposed co-processor is verified using a soft coupled oscillator model based on Kuramoto oscillators. The article also demonstrates how real-world applications such as Vector Quantization, Digit Recognition, Structural Health Monitoring, and the like, can be deployed on the proposed model. The proposed co-processor architecture is generic in nature and can be implemented using any of the existing modern day nano-oscillator technologies such as Resonant Body Transistors (RBTs), Spin-Torque Nano-Oscillators (STNOs), and Metal-Insulator Transition (MITs) . In this article, we perform a validation of the proposed architecture using the HyperField Effect Transistor (FET) technology-based coupled oscillators, which provide improvements of up to 3.5\u00d7 increase in clock speed and up to 10.75\u00d7 and 14.12\u00d7 reduction in area and power consumption, respectively, as compared to a conventional Boolean CMOS accelerator executing the same functions.<\/jats:p>","DOI":"10.1145\/3094263","type":"journal-article","created":{"date-parts":[[2017,9,29]],"date-time":"2017-09-29T12:44:38Z","timestamp":1506689078000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators"],"prefix":"10.1145","volume":"14","author":[{"given":"Neel","family":"Gala","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Madras"}]},{"given":"Sarada","family":"Krithivasan","sequence":"additional","affiliation":[{"name":"National Institute of Technology Trichy"}]},{"given":"Wei-Yu","family":"Tsai","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University"}]},{"given":"Xueqing","family":"Li","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University"}]},{"given":"Vijaykrishnan","family":"Narayanan","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University"}]},{"given":"V.","family":"Kamakoti","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Madras"}]}],"member":"320","published-online":{"date-parts":[[2017,9,29]]},"reference":[{"volume-title":"Standard practices for cycle counting in fatigue analysis","author":"ASTM.","key":"e_1_2_1_1_1","unstructured":"ASTM. 1990. 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