{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:49:42Z","timestamp":1750308582611,"version":"3.41.0"},"reference-count":39,"publisher":"Association for Computing Machinery (ACM)","issue":"5s","license":[{"start":{"date-parts":[[2017,9,27]],"date-time":"2017-09-27T00:00:00Z","timestamp":1506470400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["No. 61300047 , No 61472152 , and No. 61572209"],"award-info":[{"award-number":["No. 61300047 , No 61472152 , and No. 61572209"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"U.S. National Science Foundation","doi-asserted-by":"crossref","award":["CNS-1702474, CNS-1700719, and CCF-1547804"],"award-info":[{"award-number":["CNS-1702474, CNS-1700719, and CCF-1547804"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100012226","name":"Fundamental Research Funds for the Central Universities","doi-asserted-by":"crossref","award":["No.2016YXMS019"],"award-info":[{"award-number":["No.2016YXMS019"]}],"id":[{"id":"10.13039\/501100012226","id-type":"DOI","asserted-by":"crossref"}]},{"name":"the 111 Project","award":["No. B07038"],"award-info":[{"award-number":["No. B07038"]}]},{"name":"Key Laboratory of Data Storage System, Ministry of Education"},{"DOI":"10.13039\/501100018583","name":"Wuhan Science and Technology Project","doi-asserted-by":"crossref","award":["No. 2017010201010108"],"award-info":[{"award-number":["No. 2017010201010108"]}],"id":[{"id":"10.13039\/501100018583","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100017607","name":"Shenzhen basic research project","doi-asserted-by":"crossref","award":["No. ICYJ20170307160135308"],"award-info":[{"award-number":["No. ICYJ20170307160135308"]}],"id":[{"id":"10.13039\/501100017607","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2017,10,31]]},"abstract":"<jats:p>\n            By scaling down to smaller cell size, NAND flash has significantly increased the storage capacity in order to lower the unit cost down. However, the reliability is sacrificed due to much higher raw bit error rates. As a result, conventional error correction codes (ECCs), such as BCH codes, are not sufficient. Low-density parity check (LDPC) codes with stronger error correction capability are adopted in NAND flash to guarantee data reliability. However, read performance using LDPC is poor because of its decoding complexity. It has been found that flash cells with fewer electrons are more prone to program interference errors. As a result, program interference errors show the characteristic of value dependence. This characteristic can be exploited and translated into extra information facilitating the decoding convergence. Motivated by this observation, we propose PEAL: a flash &lt;underline&gt;p&lt;\/underline&gt;rogram interference &lt;underline&gt;e&lt;\/underline&gt;rror &lt;underline&gt;a&lt;\/underline&gt;ware &lt;underline&gt;L&lt;\/underline&gt;DPC scheme to enhance the decoding performance. PEAL integrates the obtained extra information from the value dependence into the soft-to-hard decision process in LDPC decoding to decrease decoding iterations and improve the decoding convergence speed. Simulation results show that decoding iterations are reduced by up to 69.37% and the decoding convergence speed is improved by up to 2.5\u00d7, compared with the normalized min-sum (NMS) algorithm with 2KB information lengths at an approximate raw bit error rate of 11.5 \u00d7 10\n            <jats:sup>\u22123<\/jats:sup>\n            .\n          <\/jats:p>","DOI":"10.1145\/3126563","type":"journal-article","created":{"date-parts":[[2017,9,27]],"date-time":"2017-09-27T12:33:53Z","timestamp":1506515633000},"page":"1-20","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["A Program Interference Error Aware LDPC Scheme for Improving NAND Flash Decoding Performance"],"prefix":"10.1145","volume":"16","author":[{"given":"Fei","family":"Wu","sequence":"first","affiliation":[{"name":"Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Shenzhen research institute of Huazhong University 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