{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:08:05Z","timestamp":1750306085093,"version":"3.41.0"},"reference-count":25,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2018,2,26]],"date-time":"2018-02-26T00:00:00Z","timestamp":1519603200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Storage"],"published-print":{"date-parts":[[2018,2,28]]},"abstract":"<jats:p>Emerging byte-addressable non-volatile memory (NVRAM) is expected to replace block device storages as an alternative low-latency persistent storage device. If NVRAM is used as a persistent storage device, a cache line instead of a disk page will be the unit of data transfer, consistency, and durability.<\/jats:p>\n          <jats:p>\n            In this work, we design and develop\n            <jats:italic>clfB-tree<\/jats:italic>\n            \u2014a B-tree structure whose tree node fits in a single cache line. We employ existing\n            <jats:italic>write combining store buffer<\/jats:italic>\n            and\n            <jats:italic>restricted transactional memory<\/jats:italic>\n            to provide a\n            <jats:italic>failure-atomic cache line write<\/jats:italic>\n            operation. Using the failure-atomic cache line write operations, we atomically update a clfB-tree node via a single cache line flush instruction without major changes in hardware. However, there exist many processors that do not provide SW interface for transactional memory. For those processors, our proposed clfB-tree achieves atomicity and consistency via in-place update, which requires maximum four cache line flushes. We evaluate the performance of clfB-tree on an NVRAM emulation board with ARM Cortex A-9 processor and a workstation that has Intel Xeon E7-4809 v3 processor. Our experimental results show clfB-tree outperforms wB-tree and CDDS B-tree by a large margin in terms of both insertion and search performance.\n          <\/jats:p>","DOI":"10.1145\/3129263","type":"journal-article","created":{"date-parts":[[2018,2,26]],"date-time":"2018-02-26T18:25:15Z","timestamp":1519669515000},"page":"1-17","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":18,"title":["clfB-tree"],"prefix":"10.1145","volume":"14","author":[{"given":"Wook-Hee","family":"Kim","sequence":"first","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jihye","family":"Seo","sequence":"additional","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinwoong","family":"Kim","sequence":"additional","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Beomseok","family":"Nam","sequence":"additional","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,2,26]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/320521.320530"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.14778\/2752939.2752947"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950380"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629589"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2592798.2592814"},{"volume-title":"Proceedings of the USENIX Annual Technical Conference (ATC\u201912)","year":"2012","author":"Guerra Jorge","key":"e_1_2_1_6_1"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.14778\/2735496.2735502"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2629619"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2013.6626238"},{"key":"e_1_2_1_10_1","first-page":"2","article-title":"Reducing excessive journaling overhead with small-sized NVRAM for mobile devices","volume":"6","author":"Kim Junghoon","year":"2014","journal-title":"IEEE Trans. Consum. Electron."},{"volume-title":"Proceedings of the 11th USENIX Conference on File and Storage Technologies (FAST\u201914)","year":"2014","author":"Kim Wook-Hee","key":"e_1_2_1_11_1"},{"volume-title":"Proceedings of the 11th USENIX conference on File and Storage Technologies (FAST\u201913)","author":"Lee Eunji","key":"e_1_2_1_12_1"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/RSP.2014.6966901"},{"volume-title":"Proceedings of the 2015 USENIX Anual Technical Conference (ATC\u201915)","year":"2015","author":"Lee Wongun","key":"e_1_2_1_14_1"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541957"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2015.7208274"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2524211.2524216"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.14778\/2824032.2824044"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2882903.2915251"},{"volume-title":"Proceedings of the 41st International Symposium on Computer Architecture (ISCA\u201914)","author":"Pelley Steven","key":"e_1_2_1_20_1"},{"volume-title":"Proceedings of the 9th USENIX conference on File and Storage Technologies (FAST\u201911)","author":"Venkataraman Shivaram","key":"e_1_2_1_21_1"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950379"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/2592798.2592815"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2063384.2063436"},{"volume-title":"Proceedings of the 13th USENIX Conference on File and Storage Technologies (FAST\u201915)","year":"2015","author":"Yang Jun","key":"e_1_2_1_25_1"}],"container-title":["ACM Transactions on Storage"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3129263","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3129263","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:30:15Z","timestamp":1750217415000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3129263"}},"subtitle":["Cacheline Friendly Persistent B-tree for NVRAM"],"short-title":[],"issued":{"date-parts":[[2018,2,26]]},"references-count":25,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2018,2,28]]}},"alternative-id":["10.1145\/3129263"],"URL":"https:\/\/doi.org\/10.1145\/3129263","relation":{},"ISSN":["1553-3077","1553-3093"],"issn-type":[{"type":"print","value":"1553-3077"},{"type":"electronic","value":"1553-3093"}],"subject":[],"published":{"date-parts":[[2018,2,26]]},"assertion":[{"value":"2017-02-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2017-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2018-02-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}