{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,8]],"date-time":"2026-05-08T16:10:09Z","timestamp":1778256609552,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,10,2]],"date-time":"2017-10-02T00:00:00Z","timestamp":1506902400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,10,2]]},"DOI":"10.1145\/3132402.3132424","type":"proceedings-article","created":{"date-parts":[[2017,10,12]],"date-time":"2017-10-12T12:51:09Z","timestamp":1507812669000},"page":"183-188","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":43,"title":["Do superconducting processors really need cryogenic memories?"],"prefix":"10.1145","author":[{"given":"Fred","family":"Ware","sequence":"first","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liji","family":"Gopalakrishnan","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eric","family":"Linstadt","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sally A.","family":"McKee","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Vogelsang","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kenneth L.","family":"Wright","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Craig","family":"Hampel","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gary","family":"Bronner","sequence":"additional","affiliation":[{"name":"Rambus"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2017,10,2]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"M. Harris \"Inside Pascal: NVIDIA's Newest Computing Platform \" 19 June 2016. {Online}. Available: https:\/\/devblogs.nvidia.com\/parallelforall\/inside-pascal\/. {Accessed 20 April 2017}.  M. Harris \"Inside Pascal: NVIDIA's Newest Computing Platform \" 19 June 2016. {Online}. Available: https:\/\/devblogs.nvidia.com\/parallelforall\/inside-pascal\/. {Accessed 20 April 2017}."},{"key":"e_1_3_2_1_2_1","unstructured":"Y. Sverdlik \"Here's how much energy all US data centers consume \" 27 June 2016. {Online}. Available: http:\/\/www.datacenterknowledge.com\/achives\/2016\/06\/27\/heres-how-much-energy-all-us-data-centers-consume\/. {Accessed 14 April 2017}.  Y. Sverdlik \"Here's how much energy all US data centers consume \" 27 June 2016. {Online}. Available: http:\/\/www.datacenterknowledge.com\/achives\/2016\/06\/27\/heres-how-much-energy-all-us-data-centers-consume\/. {Accessed 14 April 2017}."},{"issue":"3","key":"e_1_3_2_1_3_1","first-page":"11","article-title":"Forecasting Superconductive Electronics Technology","volume":"23","author":"Lincoln Laboratory MIT","year":"2014","journal-title":"The Next Wave"},{"key":"e_1_3_2_1_4_1","unstructured":"IBM {Online}. Available: https:\/\/www03.ibm.com\/press\/us\/en\/pressrelease\/51740.wss.  IBM {Online}. Available: https:\/\/www03.ibm.com\/press\/us\/en\/pressrelease\/51740.wss."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2015.2399866"},{"key":"e_1_3_2_1_6_1","unstructured":"F. Bedard N. K. Welker G. R. Cotter M. A. Escavage and J. T. Pinkston \"Superconducting Technology Assessment \" National Security Agency Office of Corporate Assessments 2005.  F. Bedard N. K. Welker G. R. Cotter M. A. Escavage and J. T. Pinkston \"Superconducting Technology Assessment \" National Security Agency Office of Corporate Assessments 2005."},{"issue":"17","key":"e_1_3_2_1_7_1","first-page":"C725","article-title":"Spin-transfer switching of orthogonal spin-valve devices at cryogenic temperatures","volume":"115","author":"Ye L.","year":"2014","journal-title":"IOP Journal of Applied Physics"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2013.2244634"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2012.2230294"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1250880"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/1643608"},{"key":"e_1_3_2_1_12_1","first-page":"2","volume-title":"International Symposium on VLSI Design, Automation and Test","author":"Borkar S.","year":"2011"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"J. Liu B. Jaiyen R. Veras and O. Mutlu \"RAIDR: Retention-aware intelligent DRAM refresh \" in International Symposium on Computer Architecture pp. 1--12 June 2012.   J. Liu B. Jaiyen R. Veras and O. Mutlu \"RAIDR: Retention-aware intelligent DRAM refresh \" in International Symposium on Computer Architecture pp. 1--12 June 2012.","DOI":"10.1145\/2366231.2337161"},{"key":"e_1_3_2_1_14_1","unstructured":"R. Newrock \"What are Josephson junctions? How do they work?\" 2017. {Online}. Available: https:\/\/www.scientificamerican.com\/article\/what-are-josephson-juncti\/. {Accessed 4 May 2017}.  R. Newrock \"What are Josephson junctions? How do they work?\" 2017. {Online}. Available: https:\/\/www.scientificamerican.com\/article\/what-are-josephson-juncti\/. {Accessed 4 May 2017}."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2015.375"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.1218197"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2014.2311442"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.4862195"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms4888"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2015.2420665"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2017.2647903"},{"issue":"1","key":"e_1_3_2_1_22_1","article-title":"An FPGA-based instrumentation platform for use at deep cryogenic temperatures","volume":"87","author":"Conway I. D.","year":"2016","journal-title":"AIP Review of Scientific Instruments"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2006.05.010"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1088\/1674-1056\/25\/7\/078501"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.42"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(64)90131-5"},{"key":"e_1_3_2_1_27_1","unstructured":"R. Neale \"Showtime for the Micron-Sony 16Gb ReRAM \" EE Times 4 March 2014. {Online}. Available: http:\/\/www.eetimes.com\/author.asp?doc_id=1321276. {Accessed 4 May 2017}.  R. Neale \"Showtime for the Micron-Sony 16Gb ReRAM \" EE Times 4 March 2014. {Online}. Available: http:\/\/www.eetimes.com\/author.asp?doc_id=1321276. {Accessed 4 May 2017}."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"crossref","unstructured":"S. Sills S. Yasuda A. Calderoni C. Cardon J. Strand K. Aratani and N. Ramaswamy \" Challenges for high-density 16Gb ReRAM with 27nm technology \" in IEEE Symposium on VLSI Circuits pp. T106--T107 June 2015.  S. Sills S. Yasuda A. Calderoni C. Cardon J. Strand K. Aratani and N. Ramaswamy \" Challenges for high-density 16Gb ReRAM with 27nm technology \" in IEEE Symposium on VLSI Circuits pp. T106--T107 June 2015.","DOI":"10.1109\/VLSIC.2015.7231366"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/48\/34\/345101"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2160265"},{"issue":"7","key":"e_1_3_2_1_31_1","first-page":"1","article-title":"Low-power non-volatile spintronic memory: STT-RAM and beyond","volume":"46","author":"Wang K. L.","year":"2013","journal-title":"IOP Journal of Physics D: Applied Physics"}],"event":{"name":"MEMSYS 2017: The International Symposium on Memory Systems, 2017","location":"Alexandria Virginia","acronym":"MEMSYS 2017"},"container-title":["Proceedings of the International Symposium on Memory Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3132402.3132424","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3132402.3132424","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:11:15Z","timestamp":1750212675000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3132402.3132424"}},"subtitle":["the case for cold DRAM"],"short-title":[],"issued":{"date-parts":[[2017,10,2]]},"references-count":31,"alternative-id":["10.1145\/3132402.3132424","10.1145\/3132402"],"URL":"https:\/\/doi.org\/10.1145\/3132402.3132424","relation":{},"subject":[],"published":{"date-parts":[[2017,10,2]]},"assertion":[{"value":"2017-10-02","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}