{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T13:43:14Z","timestamp":1774964594474,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":29,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,10,2]],"date-time":"2017-10-02T00:00:00Z","timestamp":1506902400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["1526798"],"award-info":[{"award-number":["1526798"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2017,10,2]]},"DOI":"10.1145\/3132402.3132436","type":"proceedings-article","created":{"date-parts":[[2017,10,12]],"date-time":"2017-10-12T12:51:09Z","timestamp":1507812669000},"page":"189-195","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":60,"title":["Cryogenic-DRAM based memory system for scalable quantum computers"],"prefix":"10.1145","author":[{"given":"Swamit S.","family":"Tannu","sequence":"first","affiliation":[{"name":"Georgia Tech"}]},{"given":"Douglas M.","family":"Carmean","sequence":"additional","affiliation":[{"name":"Microsoft Research"}]},{"given":"Moinuddin K.","family":"Qureshi","sequence":"additional","affiliation":[{"name":"Georgia Tech"}]}],"member":"320","published-online":{"date-parts":[[2017,10,2]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"https:\/\/www.asus.com\/us\/Motherboards\/RAMPAGE_V_EXTREME\/. (2015). {Online","author":"Extreme ASUS.","year":"2017","unstructured":"ASUS. 2015. Rampage V Extreme . https:\/\/www.asus.com\/us\/Motherboards\/RAMPAGE_V_EXTREME\/. (2015). {Online ; last accessed 5- May - 2017 }. ASUS. 2015. Rampage V Extreme. https:\/\/www.asus.com\/us\/Motherboards\/RAMPAGE_V_EXTREME\/. (2015). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_2_1","volume-title":"Device and circuit cryogenic operation for low temperature electronics","author":"Balestra Francis","unstructured":"Francis Balestra and G\u00e9rard Ghibaudo . 2001. Device and circuit cryogenic operation for low temperature electronics . Springer . Francis Balestra and G\u00e9rard Ghibaudo. 2001. Device and circuit cryogenic operation for low temperature electronics. Springer."},{"key":"e_1_3_2_1_3_1","volume-title":"ISCA 2016 Keynote, http:\/\/dcarmean.azurewebsites.net\/ISCA2016","author":"Carmean Douglas M.","year":"2017","unstructured":"Douglas M. Carmean . 2017 . Quantum and Cryo and DNA, oh my! sights along the new yellow brick road . ISCA 2016 Keynote, http:\/\/dcarmean.azurewebsites.net\/ISCA2016 .pdf. (2017). {Online; accessed 7-June-2017}. Douglas M. Carmean. 2017. Quantum and Cryo and DNA, oh my! sights along the new yellow brick road. ISCA 2016 Keynote, http:\/\/dcarmean.azurewebsites.net\/ISCA2016.pdf. (2017). {Online; accessed 7-June-2017}."},{"key":"e_1_3_2_1_4_1","unstructured":"International Business Machines Corporation. 2017. Universal Quantum Computer Development at IBM:. http:\/\/research.ibm.com\/ibm-q\/research\/. (2017). {Online; accessed 3-April-2017}.  International Business Machines Corporation. 2017. Universal Quantum Computer Development at IBM:. http:\/\/research.ibm.com\/ibm-q\/research\/. (2017). {Online; accessed 3-April-2017}."},{"key":"e_1_3_2_1_5_1","volume-title":"A white paper on the benefits of chipkill-correct ECC for PC server main memory. IBM Microelectronics Division 11","author":"Dell Timothy J","year":"1997","unstructured":"Timothy J Dell . 1997. A white paper on the benefits of chipkill-correct ECC for PC server main memory. IBM Microelectronics Division 11 ( 1997 ). Timothy J Dell. 1997. A white paper on the benefits of chipkill-correct ECC for PC server main memory. IBM Microelectronics Division 11 (1997)."},{"key":"e_1_3_2_1_6_1","volume-title":"Towards practical classical processing for the surface code. Physical review letters 108, 18","author":"Fowler Austin G","year":"2012","unstructured":"Austin G Fowler , Adam C Whiteside , and Lloyd CL Hollenberg . 2012. Towards practical classical processing for the surface code. Physical review letters 108, 18 ( 2012 ), 180501. Austin G Fowler, Adam C Whiteside, and Lloyd CL Hollenberg. 2012. Towards practical classical processing for the surface code. Physical review letters 108, 18 (2012), 180501."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1506409.1506429"},{"key":"e_1_3_2_1_8_1","volume-title":"A software methodology for compiling quantum programs. arXiv preprint arXiv:1604.01401","author":"H\u00e4ner Thomas","year":"2016","unstructured":"Thomas H\u00e4ner , Damian S Steiger , Krysta Svore , and Matthias Troyer . 2016. A software methodology for compiling quantum programs. arXiv preprint arXiv:1604.01401 ( 2016 ). Thomas H\u00e4ner, Damian S Steiger, Krysta Svore, and Matthias Troyer. 2016. A software methodology for compiling quantum programs. arXiv preprint arXiv:1604.01401 (2016)."},{"key":"e_1_3_2_1_9_1","first-page":"1","article-title":"Improving Quantum Algorithms for Quantum Chemistry. Quantum Info","volume":"15","author":"Hastings Matthew B.","year":"2015","unstructured":"Matthew B. Hastings , Dave Wecker , Bela Bauer , and Matthias Troyer . 2015 . Improving Quantum Algorithms for Quantum Chemistry. Quantum Info . Comput. 15 , 1 -- 2 (Jan. 2015). Matthew B. Hastings, Dave Wecker, Bela Bauer, and Matthias Troyer. 2015. Improving Quantum Algorithms for Quantum Chemistry. Quantum Info. Comput. 15, 1--2 (Jan. 2015).","journal-title":"Comput."},{"key":"e_1_3_2_1_10_1","volume-title":"Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. IEEE, 32--35","author":"Henkels WH","year":"1989","unstructured":"WH Henkels , NCC Lu , W Hwang , TV Rajeevakumar , RL Franch , KA Jenkins , TJ Bucelot , DF Heidel , and MJ Immediato . 1989 . A low temperature 12 ns DRAM. In VLSI Technology , Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. IEEE, 32--35 . WH Henkels, NCC Lu, W Hwang, TV Rajeevakumar, RL Franch, KA Jenkins, TJ Bucelot, DF Heidel, and MJ Immediato. 1989. A low temperature 12 ns DRAM. In VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. IEEE, 32--35."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/LTSE.1989.50171"},{"key":"e_1_3_2_1_12_1","volume-title":"Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. 32--35","author":"Henkels W. H.","unstructured":"W. H. Henkels , N. C. C. Lu , W. Hwang , T. V. Rajeevakumar , R. L. Franch , K. A. Jenkins , T. J. Bucelot , D. F. Heidel , and M. J. Immediato . 1989. A low temperature 12 ns DRAM. In VLSI Technology , Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. 32--35 . W. H. Henkels, N. C. C. Lu, W. Hwang, T. V. Rajeevakumar, R. L. Franch, K. A. Jenkins, T. J. Bucelot, D. F. Heidel, and M. J. Immediato. 1989. A low temperature 12 ns DRAM. In VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on. 32--35."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2013.2244634"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevApplied.3.024010"},{"key":"e_1_3_2_1_15_1","unstructured":"Inc. Innovations. 2012. Ramcheck-LXI Owners Manual. http:\/\/www.memorytesters.com\/ramcheck_lx\/ramcheck_lx_manual.pdf. (2012). {Online; last accessed 5-May-2017}.  Inc. Innovations. 2012. Ramcheck-LXI Owners Manual. http:\/\/www.memorytesters.com\/ramcheck_lx\/ramcheck_lx_manual.pdf. (2012). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_16_1","volume-title":"http:\/\/ark.intel.com\/products\/82930\/Intel-Core-i7-5960X-Processor-Extreme-Edition-20M-Cache-up-to-GHz. (2015). {Online","author":"X.","year":"2017","unstructured":"Intel. 2015. Intel-Core-i7-5960 X. http:\/\/ark.intel.com\/products\/82930\/Intel-Core-i7-5960X-Processor-Extreme-Edition-20M-Cache-up-to-GHz. (2015). {Online ; last accessed 5- May - 2017 }. Intel. 2015. Intel-Core-i7-5960X. http:\/\/ark.intel.com\/products\/82930\/Intel-Core-i7-5960X-Processor-Extreme-Edition-20M-Cache-up-to-GHz. (2015). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_17_1","volume-title":"Intel Invests US$50 Million to Advance Quantum Computing. https:\/\/newsroom.intel.com\/news-releases\/intel-invests-us50-million-to-advance-quantum-computing\/. (2015). {Online","year":"2016","unstructured":"Intel. 2015. Intel Invests US$50 Million to Advance Quantum Computing. https:\/\/newsroom.intel.com\/news-releases\/intel-invests-us50-million-to-advance-quantum-computing\/. (2015). {Online ; accessed 2- November - 2016 }. Intel. 2015. Intel Invests US$50 Million to Advance Quantum Computing. https:\/\/newsroom.intel.com\/news-releases\/intel-invests-us50-million-to-advance-quantum-computing\/. (2015). {Online; accessed 2-November-2016}."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.94.032321"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485937"},{"key":"e_1_3_2_1_20_1","volume-title":"Latency and power measurements on a 64-kb hybrid Josephson-CMOS memory","author":"Liu Q","year":"2007","unstructured":"Q Liu , K Fujiwara , X Meng , SR Whiteley , T Van Duzer , Nobuyuki Yoshikawa , Y Thakahashi , T Hikida , and N Kawai . 2007. Latency and power measurements on a 64-kb hybrid Josephson-CMOS memory . IEEE transactions on applied superconductivity 17, 2 ( 2007 ), 526--529. Q Liu, K Fujiwara, X Meng, SR Whiteley, T Van Duzer, Nobuyuki Yoshikawa, Y Thakahashi, T Hikida, and N Kawai. 2007. Latency and power measurements on a 64-kb hybrid Josephson-CMOS memory. IEEE transactions on applied superconductivity 17, 2 (2007), 526--529."},{"key":"e_1_3_2_1_21_1","volume-title":"APS Meeting Abstracts.","author":"Medford J.","unstructured":"J. Medford , M. Stoutimore , Q. Herr , O. Naaman , H. Hearne , J. Strand , A. Przybysz , A. Pesetski , and J. Przybysz . 2015. Demonstrated control of a Transmon using a Reciprocal Quantum Logic digital circuit - Part 2 . In APS Meeting Abstracts. J. Medford, M. Stoutimore, Q. Herr, O. Naaman, H. Hearne, J. Strand, A. Przybysz, A. Pesetski, and J. Przybysz. 2015. Demonstrated control of a Transmon using a Reciprocal Quantum Logic digital circuit - Part 2. In APS Meeting Abstracts."},{"key":"e_1_3_2_1_22_1","volume-title":"https:\/\/www.omega.com\/manuals\/manualpdf\/M4525.pdf. (2017). {Online","year":"2017","unstructured":"Omega. 2017. TC08 Manual. https:\/\/www.omega.com\/manuals\/manualpdf\/M4525.pdf. (2017). {Online ; last accessed 5- May - 2017 }. Omega. 2017. TC08 Manual. https:\/\/www.omega.com\/manuals\/manualpdf\/M4525.pdf. (2017). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_23_1","unstructured":"PassMark. 2014. Memtest86 Technical Information. http:\/\/www.memtest86.com\/technical.html. (2014). {Online; last accessed 5-May-2017}.  PassMark. 2014. Memtest86 Technical Information. http:\/\/www.memtest86.com\/technical.html. (2014). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_24_1","volume-title":"Cryogenic Memory. https:\/\/www.rambus.com\/emerging-solutions\/cryogenic-memory. (2017). {Online","year":"2017","unstructured":"Rambus. 2017. Cryogenic Memory. https:\/\/www.rambus.com\/emerging-solutions\/cryogenic-memory. (2017). {Online ; last accessed 5- May - 2017 }. Rambus. 2017. Cryogenic Memory. https:\/\/www.rambus.com\/emerging-solutions\/cryogenic-memory. (2017). {Online; last accessed 5-May-2017}."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1137\/S0097539795293172"},{"key":"e_1_3_2_1_26_1","volume-title":"Google Quantum Dream Machine. https:\/\/www.technologyreview.com\/s\/544421\/googles-quantum-dream-machine\/?state=email-verified. (2015). {Online","author":"Simonite Tom","year":"2016","unstructured":"Tom Simonite . 2015. Google Quantum Dream Machine. https:\/\/www.technologyreview.com\/s\/544421\/googles-quantum-dream-machine\/?state=email-verified. (2015). {Online ; accessed 2- November - 2016 }. Tom Simonite. 2015. Google Quantum Dream Machine. https:\/\/www.technologyreview.com\/s\/544421\/googles-quantum-dream-machine\/?state=email-verified. (2015). {Online; accessed 2-November-2016}."},{"key":"e_1_3_2_1_27_1","volume-title":"The Tiny Startup Racing Google to Build a Quantum Computing Chip. https:\/\/www.technologyreview.com\/s\/600711\/the-tiny-startup-racing-google-to-build-a-quantum-computing-chip\/. (2016). {Online","author":"Simonite Tom","year":"2016","unstructured":"Tom Simonite . 2016. The Tiny Startup Racing Google to Build a Quantum Computing Chip. https:\/\/www.technologyreview.com\/s\/600711\/the-tiny-startup-racing-google-to-build-a-quantum-computing-chip\/. (2016). {Online ; accessed 2- November - 2016 }. Tom Simonite. 2016. The Tiny Startup Racing Google to Build a Quantum Computing Chip. https:\/\/www.technologyreview.com\/s\/600711\/the-tiny-startup-racing-google-to-build-a-quantum-computing-chip\/. (2016). {Online; accessed 2-November-2016}."},{"key":"e_1_3_2_1_28_1","volume-title":"APS Meeting Abstracts.","author":"Stoutimore M.","unstructured":"M. Stoutimore , J. Medford , Q. Herr , O. Naaman , H. Hearne , J. Strand , A. Przybysz , A. Pesetski , and J. Przybysz . 2015. Demonstrated control of a Transmon using a Reciprocal Quantum Logic digital circuit - Part 1 . In APS Meeting Abstracts. M. Stoutimore, J. Medford, Q. Herr, O. Naaman, H. Hearne, J. Strand, A. Przybysz, A. Pesetski, and J. Przybysz. 2015. Demonstrated control of a Transmon using a Reciprocal Quantum Logic digital circuit - Part 1. In APS Meeting Abstracts."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1088\/0953-2048\/29\/8\/084007"}],"event":{"name":"MEMSYS 2017: The International Symposium on Memory Systems, 2017","location":"Alexandria Virginia","acronym":"MEMSYS 2017"},"container-title":["Proceedings of the International Symposium on Memory Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3132402.3132436","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3132402.3132436","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3132402.3132436","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T19:04:56Z","timestamp":1750273496000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3132402.3132436"}},"subtitle":["a feasibility study"],"short-title":[],"issued":{"date-parts":[[2017,10,2]]},"references-count":29,"alternative-id":["10.1145\/3132402.3132436","10.1145\/3132402"],"URL":"https:\/\/doi.org\/10.1145\/3132402.3132436","relation":{},"subject":[],"published":{"date-parts":[[2017,10,2]]},"assertion":[{"value":"2017-10-02","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}