{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:35:09Z","timestamp":1750221309716,"version":"3.41.0"},"reference-count":30,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2018,1,11]],"date-time":"2018-01-11T00:00:00Z","timestamp":1515628800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1639995"],"award-info":[{"award-number":["1639995"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"crossref","award":["# 2692.001"],"award-info":[{"award-number":["# 2692.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2018,1,31]]},"abstract":"<jats:p>The Liquid State Machine (LSM) is a promising model of recurrent spiking neural networks that provides an appealing brain-inspired computing paradigm for machine-learning applications such as pattern recognition. Moreover, processing information directly on spiking events makes the LSM well suited for cost- and energy-efficient hardware implementation. In this article, we systematically present three techniques for optimizing energy efficiency while maintaining good performance of the proposed LSM neural processors from both an algorithmic and hardware implementation point of view. First, to realize adaptive LSM neural processors, thus boost learning performance, we propose a hardware-friendly Spike-Timing Dependent Plastic (STDP) mechanism for on-chip tuning. Then, the LSM processor incorporates a novel runtime correlation-based neuron gating scheme to minimize the power dissipated by reservoir neurons. Furthermore, an activity-dependent clock gating approach is presented to address the energy inefficiency due to the memory-intensive nature of the proposed neural processors.<\/jats:p>\n          <jats:p>Using two different real-world tasks of speech and image recognition to benchmark, we demonstrate that the proposed architecture boosts the average learning performance by up to 2.0% while reducing energy dissipation by up to 29% compared to a baseline LSM with little extra hardware overhead on a Xilinx Virtex-6 FPGA.<\/jats:p>","DOI":"10.1145\/3145479","type":"journal-article","created":{"date-parts":[[2018,1,12]],"date-time":"2018-01-12T13:49:50Z","timestamp":1515764990000},"page":"1-21","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["Online Adaptation and Energy Minimization for Hardware Recurrent Spiking Neural Networks"],"prefix":"10.1145","volume":"14","author":[{"given":"Yu","family":"Liu","sequence":"first","affiliation":[{"name":"Texas A8M University, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yingyezhe","family":"Jin","sequence":"additional","affiliation":[{"name":"Texas A8M University, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Li","sequence":"additional","affiliation":[{"name":"Texas A8M University, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,1,11]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_2_1_1_1","DOI":"10.1109\/TCAD.2015.2474396"},{"doi-asserted-by":"publisher","key":"e_1_2_1_2_1","DOI":"10.1109\/JPROC.2014.2313565"},{"doi-asserted-by":"publisher","key":"e_1_2_1_3_1","DOI":"10.1146\/annurev.neuro.24.1.139"},{"doi-asserted-by":"publisher","key":"e_1_2_1_4_1","DOI":"10.1109\/ISCAS.2011.5937655"},{"doi-asserted-by":"publisher","key":"e_1_2_1_5_1","DOI":"10.1162\/NECO_a_00052"},{"doi-asserted-by":"publisher","key":"e_1_2_1_6_1","DOI":"10.1145\/1390156.1390177"},{"doi-asserted-by":"publisher","key":"e_1_2_1_7_1","DOI":"10.1109\/CVPR.2016.350"},{"doi-asserted-by":"publisher","key":"e_1_2_1_8_1","DOI":"10.1007\/978-3-540-87536-9_53"},{"doi-asserted-by":"publisher","key":"e_1_2_1_9_1","DOI":"10.1162\/neco.2006.18.7.1527"},{"doi-asserted-by":"publisher","key":"e_1_2_1_10_1","DOI":"10.1109\/IJCNN.2016.7727328"},{"doi-asserted-by":"publisher","key":"e_1_2_1_11_1","DOI":"10.1016\/j.neucom.2016.11.045"},{"key":"e_1_2_1_12_1","volume-title":"IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH\u201916)","author":"Jin Yingyezhe","year":"2016","unstructured":"Yingyezhe Jin , Yu Liu , and Peng Li . 2016 . SSO-LSM: A sparse and self-organizing architecture for liquid state machine based neural processors . In IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH\u201916) . IEEE, 55--60. Yingyezhe Jin, Yu Liu, and Peng Li. 2016. SSO-LSM: A sparse and self-organizing architecture for liquid state machine based neural processors. In IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH\u201916). IEEE, 55--60."},{"key":"e_1_2_1_13_1","volume-title":"Hinton","author":"Krizhevsky Alex","year":"2012","unstructured":"Alex Krizhevsky , Ilya Sutskever , and Geoffrey E . Hinton . 2012 . Imagenet classification with deep convolutional neural networks. In Advances in Neural Information Processing Systems . 1097--1105. Alex Krizhevsky, Ilya Sutskever, and Geoffrey E. Hinton. 2012. Imagenet classification with deep convolutional neural networks. In Advances in Neural Information Processing Systems. 1097--1105."},{"doi-asserted-by":"publisher","key":"e_1_2_1_14_1","DOI":"10.3389\/neuro.10.023.2009"},{"doi-asserted-by":"publisher","key":"e_1_2_1_15_1","DOI":"10.1109\/5.726791"},{"doi-asserted-by":"publisher","key":"e_1_2_1_16_1","DOI":"10.1016\/j.cosrev.2009.03.005"},{"doi-asserted-by":"publisher","key":"e_1_2_1_17_1","DOI":"10.1109\/ICASSP.1982.1171644"},{"doi-asserted-by":"publisher","key":"e_1_2_1_18_1","DOI":"10.1162\/089976602760407955"},{"key":"e_1_2_1_19_1","volume-title":"International Joint Conference on Neural Networks (IJCNN\u201906)","author":"Norton David","year":"2006","unstructured":"David Norton and Dan Ventura . 2006 . Preparing more effective liquid state machines using Hebbian learning . In International Joint Conference on Neural Networks (IJCNN\u201906) . IEEE, 4243--4248. David Norton and Dan Ventura. 2006. Preparing more effective liquid state machines using Hebbian learning. In International Joint Conference on Neural Networks (IJCNN\u201906). IEEE, 4243--4248."},{"doi-asserted-by":"publisher","key":"e_1_2_1_20_1","DOI":"10.1109\/TBCAS.2014.2362969"},{"doi-asserted-by":"publisher","key":"e_1_2_1_21_1","DOI":"10.1162\/NECO_a_00886"},{"doi-asserted-by":"publisher","key":"e_1_2_1_22_1","DOI":"10.1109\/72.977304"},{"doi-asserted-by":"publisher","key":"e_1_2_1_23_1","DOI":"10.1109\/IJCNN.2003.1224019"},{"volume-title":"The TI46 Speech Corpus. Retrieved","year":"2017","unstructured":"TI46. The TI46 Speech Corpus. Retrieved November 11, 2017 from http:\/\/catalog.ldc.upenn.edu\/LDC93S9. TI46. The TI46 Speech Corpus. Retrieved November 11, 2017 from http:\/\/catalog.ldc.upenn.edu\/LDC93S9.","key":"e_1_2_1_24_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_25_1","DOI":"10.1016\/j.ipl.2005.05.019"},{"doi-asserted-by":"publisher","key":"e_1_2_1_26_1","DOI":"10.1109\/BioCAS.2015.7348397"},{"doi-asserted-by":"publisher","key":"e_1_2_1_27_1","DOI":"10.1109\/ISCAS.2016.7527245"},{"volume-title":"Retrieved","year":"2017","unstructured":"Xilinx. Xilinx Intelligent Clock Gating . Retrieved November 11, 2017 from https:\/\/www.xilinx.com\/support\/documentation\/application_notes\/xapp790-7-series-clock-gating.pdf. Xilinx. Xilinx Intelligent Clock Gating. Retrieved November 11, 2017 from https:\/\/www.xilinx.com\/support\/documentation\/application_notes\/xapp790-7-series-clock-gating.pdf.","key":"e_1_2_1_28_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_29_1","DOI":"10.1016\/j.neucom.2013.06.019"},{"doi-asserted-by":"publisher","key":"e_1_2_1_30_1","DOI":"10.1109\/TNNLS.2015.2388544"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3145479","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3145479","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3145479","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:13:35Z","timestamp":1750212815000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3145479"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1,11]]},"references-count":30,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2018,1,31]]}},"alternative-id":["10.1145\/3145479"],"URL":"https:\/\/doi.org\/10.1145\/3145479","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2018,1,11]]},"assertion":[{"value":"2017-04-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2017-09-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2018-01-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}