{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:34:31Z","timestamp":1750221271904,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":32,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,1,28]],"date-time":"2018-01-28T00:00:00Z","timestamp":1517097600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,1,28]]},"DOI":"10.1145\/3149457.3149471","type":"proceedings-article","created":{"date-parts":[[2018,1,12]],"date-time":"2018-01-12T13:49:57Z","timestamp":1515764997000},"page":"241-250","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["A Portability Layer of an All-pairs Operation for Hierarchical N-Body Algorithm Framework Tapas"],"prefix":"10.1145","author":[{"given":"Motohiko","family":"Matsuda","sequence":"first","affiliation":[{"name":"RIKEN AICS, Kobe, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Keisuke","family":"Fukuda","sequence":"additional","affiliation":[{"name":"Tokyo Institute of Technology, Tokyo, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Naoya","family":"Maruyama","sequence":"additional","affiliation":[{"name":"RIKEN AICS, Kobe, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,1,28]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Thrust: A Productivity-Oriented Library for CUDA. In GPU Gems 3 (chapter 26)","author":"Bell Nathan","year":"2007","unstructured":"Nathan Bell and Jared Hoberock . 2007 . Thrust: A Productivity-Oriented Library for CUDA. In GPU Gems 3 (chapter 26) , Hubert Nguyen (Ed.). Addison Wesley Professional . Nathan Bell and Jared Hoberock. 2007. Thrust: A Productivity-Oriented Library for CUDA. In GPU Gems 3 (chapter 26), Hubert Nguyen (Ed.). Addison Wesley Professional."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.5555\/28195.28216"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1109\/SNPD.2009.34"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.1002\/cpe.3088"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.1145\/2141702.2141703"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1109\/XSW.2013.7"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1145\/1863482.1863487"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1016\/0743-7315(90)90035-N"},{"unstructured":"Keisuke Fukuda and Naoya Maruyama. 2016. FMM Code in Tapas. https:\/\/git.io\/vrsAz. (2016).  Keisuke Fukuda and Naoya Maruyama. 2016. FMM Code in Tapas. https:\/\/git.io\/vrsAz. (2016).","key":"e_1_3_2_1_9_1"},{"key":"e_1_3_2_1_10_1","volume-title":"Tapas: An Implicitly Parallel Programming Framework for Hierarchical N-Body Algorithms. In IEEE International Conference on Parallel and Distributed Systems (ICPADS).","author":"Fukuda Keisuke","year":"2016","unstructured":"Keisuke Fukuda , Motohiko Matsuda , Naoya Maruyama , Rio Yokota , Kenjiro Taura , and Satoshi Matsuoka . 2016 . Tapas: An Implicitly Parallel Programming Framework for Hierarchical N-Body Algorithms. In IEEE International Conference on Parallel and Distributed Systems (ICPADS). Keisuke Fukuda, Motohiko Matsuda, Naoya Maruyama, Rio Yokota, Kenjiro Taura, and Satoshi Matsuoka. 2016. Tapas: An Implicitly Parallel Programming Framework for Hierarchical N-Body Algorithms. In IEEE International Conference on Parallel and Distributed Systems (ICPADS)."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1002\/cpe.3076"},{"unstructured":"Kate Gregory and Ade Miller. 2012. C++ AMP: Accelerated Massive Parallelism with Microsoft Visual C++.  Kate Gregory and Ade Miller. 2012. C++ AMP: Accelerated Massive Parallelism with Microsoft Visual C++.","key":"e_1_3_2_1_12_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1016\/j.parco.2006.08.003"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_14_1","DOI":"10.1007\/s10766-006-0018-x"},{"key":"e_1_3_2_1_15_1","volume-title":"ISO\/IEC TS 19570:2015 (N4507)","author":"Hoberock Jared","year":"2015","unstructured":"Jared Hoberock . 2015 . Programming Languages -- Technical Specification for C++ Extensions for Parallelism . ISO\/IEC TS 19570:2015 (N4507) (2015). http:\/\/www.open-std.org\/jtc1\/sc22\/wg21\/docs\/papers\/2015\/n4507.pdf(draft) Jared Hoberock. 2015. Programming Languages -- Technical Specification for C++ Extensions for Parallelism. ISO\/IEC TS 19570:2015 (N4507) (2015). http:\/\/www.open-std.org\/jtc1\/sc22\/wg21\/docs\/papers\/2015\/n4507.pdf(draft)"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_16_1","DOI":"10.5555\/1098666"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_17_1","DOI":"10.1109\/SC.2010.49"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_18_1","DOI":"10.1145\/2364527.2364564"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_19_1","DOI":"10.1145\/1146847.1146860"},{"unstructured":"Microsoft. 2013. C++ AMP: Language and Programming Model Version 1.2.  Microsoft. 2013. C++ AMP: Language and Programming Model Version 1.2.","key":"e_1_3_2_1_20_1"},{"volume-title":"GPU Gems 3 (chapter 31)","author":"Nyland Lars","unstructured":"Lars Nyland , Mark Harris , and Jan Prins . 2007. Fast N-body simulation with CUDA . In GPU Gems 3 (chapter 31) , Hubert Nguyen (Ed.). Addison Wesley Professional . Lars Nyland, Mark Harris, and Jan Prins. 2007. Fast N-body simulation with CUDA. In GPU Gems 3 (chapter 31), Hubert Nguyen (Ed.). Addison Wesley Professional.","key":"e_1_3_2_1_21_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_22_1","DOI":"10.1145\/800136.804466"},{"key":"e_1_3_2_1_23_1","volume-title":"Harnessing the Multicores: Nested Data Parallelism in Haskell. In Conf. on Foundations of Software Technology and Theoretical Computer Science (FSTTCS '08)","volume":"2","author":"Jones Simon Peyton","unstructured":"Simon Peyton Jones , Roman Leshchinskiy , Gabriele Keller , and Manuel M. T. Chakravarty . 2008 . Harnessing the Multicores: Nested Data Parallelism in Haskell. In Conf. on Foundations of Software Technology and Theoretical Computer Science (FSTTCS '08) , Vol. 2 . Simon Peyton Jones, Roman Leshchinskiy, Gabriele Keller, and Manuel M. T. Chakravarty. 2008. Harnessing the Multicores: Nested Data Parallelism in Haskell. In Conf. on Foundations of Software Technology and Theoretical Computer Science (FSTTCS '08), Vol. 2."},{"volume-title":"Int. Conference on Supercomputing (ICS '87)","author":"John","unstructured":"John R. Rose and Guy L. Steele, Jr. 1987. C*: an extended C language for data parallel programming . In Int. Conference on Supercomputing (ICS '87) . John R. Rose and Guy L. Steele, Jr. 1987. C*: an extended C language for data parallel programming. In Int. Conference on Supercomputing (ICS '87).","key":"e_1_3_2_1_24_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_25_1","DOI":"10.1016\/j.parco.2013.01.002"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_26_1","DOI":"10.1007\/s10766-013-0265-6"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_27_1","DOI":"10.1145\/1168857.1168898"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_28_1","DOI":"10.1002\/cpe.3087"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_29_1","DOI":"10.1002\/cpe.3078"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_30_1","DOI":"10.1145\/169627.169640"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_31_1","DOI":"10.1007\/978-3-642-01970-8_96"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_32_1","DOI":"10.1260\/1748-3018.7.3.301"}],"event":{"sponsor":["SIGHPC ACM Special Interest Group on High Performance Computing, Special Interest Group on High Performance Computing","IPSJ Information Processing Society of Japan","Cybermedia Center, Osaka University Cybermedia Center, Osaka University"],"acronym":"HPC Asia 2018","name":"HPC Asia 2018: International Conference on High Performance Computing in Asia-Pacific Region","location":"Chiyoda Tokyo Japan"},"container-title":["Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3149457.3149471","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3149457.3149471","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:11:07Z","timestamp":1750212667000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3149457.3149471"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1,28]]},"references-count":32,"alternative-id":["10.1145\/3149457.3149471","10.1145\/3149457"],"URL":"https:\/\/doi.org\/10.1145\/3149457.3149471","relation":{},"subject":[],"published":{"date-parts":[[2018,1,28]]},"assertion":[{"value":"2018-01-28","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}