{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:33:06Z","timestamp":1750221186334,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":15,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,2,24]],"date-time":"2018-02-24T00:00:00Z","timestamp":1519430400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,2,24]]},"DOI":"10.1145\/3178433.3178436","type":"proceedings-article","created":{"date-parts":[[2018,2,16]],"date-time":"2018-02-16T16:01:58Z","timestamp":1518796918000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["SIMDization of Small Tensor Multiplication Kernels for Wide SIMD Vector Processors"],"prefix":"10.1145","author":[{"given":"Christopher","family":"Rodrigues","sequence":"first","affiliation":[{"name":"Huawei America Research Lab, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amarin","family":"Phaosawasdi","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Wu","sequence":"additional","affiliation":[{"name":"Huawei America Research Lab, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,2,24]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2004.840311"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/155332.155343"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1356052.1356053"},{"key":"e_1_3_2_1_5_1","unstructured":"K. Kennedy and J. Allen. 2001. Optimizing Compilers for Modern Architectures: A Dependence-based Approach. Morgan Kaufmann Publishers Inc.   K. Kennedy and J. Allen. 2001. Optimizing Compilers for Modern Architectures: A Dependence-based Approach. Morgan Kaufmann Publishers Inc."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3133901"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2491956.2462187"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349320"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2254064.2254106"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454119"},{"volume-title":"Proc. IEEE\/ACM International Symposium on Code Generation and Optimization. IEEE Computer Society, 190--201","author":"Porpodas V.","key":"e_1_3_2_1_11_1","unstructured":"V. Porpodas , A. Magni , and T. Jones . 2015. PSLP: Padded SLP Automatic Vectorization . In Proc. IEEE\/ACM International Symposium on Code Generation and Optimization. IEEE Computer Society, 190--201 . V. Porpodas, A. Magni, and T. Jones. 2015. PSLP: Padded SLP Automatic Vectorization. In Proc. IEEE\/ACM International Symposium on Code Generation and Optimization. IEEE Computer Society, 190--201."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1133981.1133996"},{"volume-title":"Proc. International Conference on Parallel Architectures and Compilation Techniques. IEEE, 45--55","author":"Shin J.","key":"e_1_3_2_1_13_1","unstructured":"J. Shin , J. Chame , and M. Hall . 2002. Compiler-controlled Caching in Superword Register Files for Multimedia Extension Architectures . In Proc. International Conference on Parallel Architectures and Compilation Techniques. IEEE, 45--55 . J. Shin, J. Chame, and M. Hall. 2002. Compiler-controlled Caching in Superword Register Files for Multimedia Extension Architectures. In Proc. International Conference on Parallel Architectures and Compilation Techniques. IEEE, 45--55."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1155\/2015\/269764"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2009.18"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088172"}],"event":{"name":"PPoPP '18: 23nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGHPC ACM Special Interest Group on High Performance Computing, Special Interest Group on High Performance Computing"],"location":"Vienna Austria","acronym":"PPoPP '18"},"container-title":["Proceedings of the 2018 4th Workshop on Programming Models for SIMD\/Vector Processing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3178433.3178436","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3178433.3178436","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:39:07Z","timestamp":1750210747000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3178433.3178436"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2,24]]},"references-count":15,"alternative-id":["10.1145\/3178433.3178436","10.1145\/3178433"],"URL":"https:\/\/doi.org\/10.1145\/3178433.3178436","relation":{},"subject":[],"published":{"date-parts":[[2018,2,24]]},"assertion":[{"value":"2018-02-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}