{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T07:09:55Z","timestamp":1760080195758,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":12,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,6,24]],"date-time":"2018-06-24T00:00:00Z","timestamp":1529798400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,6,24]]},"DOI":"10.1145\/3195970.3196059","type":"proceedings-article","created":{"date-parts":[[2018,6,19]],"date-time":"2018-06-19T13:54:59Z","timestamp":1529416499000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["HFMV"],"prefix":"10.1145","author":[{"given":"Hanbin","family":"Hu","sequence":"first","affiliation":[{"name":"Texas A&M University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qingran","family":"Zheng","sequence":"additional","affiliation":[{"name":"Texas A&M University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ya","family":"Wang","sequence":"additional","affiliation":[{"name":"Texas A&M University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Li","sequence":"additional","affiliation":[{"name":"Texas A&M University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,6,24]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.889384"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1214\/09-AOAS285"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"crossref","unstructured":"W. Denman B. Akbarpour S. Tahar M. H. Zaki and L. C. Paulson. 2009. Formal verification of analog designs using MetiTarski. In Formal Methods in Computer-Aided Design (FMCAD). 93--100.  W. Denman B. Akbarpour S. Tahar M. H. Zaki and L. C. Paulson. 2009. Formal verification of analog designs using MetiTarski. In Formal Methods in Computer-Aided Design (FMCAD). 93--100.","DOI":"10.1109\/FMCAD.2009.5351136"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2299957"},{"volume-title":"IEEE International Conference on IC Design and Technology (ICICDT). 1--4.","author":"Lin H.","key":"e_1_3_2_1_5_1","unstructured":"H. Lin , A. M. Khan , and P. Li . 2017. Statistical circuit performance dependency analysis via sparse relevance kernel machine . In IEEE International Conference on IC Design and Technology (ICICDT). 1--4. H. Lin, A. M. Khan, and P. Li. 2017. Statistical circuit performance dependency analysis via sparse relevance kernel machine. In IEEE International Conference on IC Design and Technology (ICICDT). 1--4."},{"volume-title":"Automation Test in Europe Conference Exhibition (DATE). 1442--1447","author":"Miller M.","key":"e_1_3_2_1_6_1","unstructured":"M. Miller and F. Brewer . 2013. Formal verification of analog circuit parameters across variation utilizing SAT. In Design , Automation Test in Europe Conference Exhibition (DATE). 1442--1447 . M. Miller and F. Brewer. 2013. Formal verification of analog circuit parameters across variation utilizing SAT. In Design, Automation Test in Europe Conference Exhibition (DATE). 1442--1447."},{"volume-title":"Proceedings of the International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS). 337--340","author":"Moura L. D.","key":"e_1_3_2_1_7_1","unstructured":"L. D. Moura and N. Bj\u00f8rner . 2008. Z3: An Efficient SMT Solver . In Proceedings of the International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS). 337--340 . L. D. Moura and N. Bj\u00f8rner. 2008. Z3: An Efficient SMT Solver. In Proceedings of the International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS). 337--340."},{"volume-title":"Proceedings of the International Conference on Computer Aided Verification (CAV). 20--36","author":"Moura L. D.","key":"e_1_3_2_1_8_1","unstructured":"L. D. Moura , B. Dutertre , and N. Shankar . 2007. A Tutorial on Satisiability Modulo Theories . In Proceedings of the International Conference on Computer Aided Verification (CAV). 20--36 . L. D. Moura, B. Dutertre, and N. Shankar. 2007. A Tutorial on Satisiability Modulo Theories. In Proceedings of the International Conference on Computer Aided Verification (CAV). 20--36."},{"volume-title":"IEEE 34th International Conference on Computer Design (ICCD). 448--451","author":"Rana M.","key":"e_1_3_2_1_9_1","unstructured":"M. Rana , R. Canal , J. Han , and B. Cockburn . 2016. SRAM memory margin probability failure estimation using Gaussian Process regression . In IEEE 34th International Conference on Computer Design (ICCD). 448--451 . M. Rana, R. Canal, J. Han, and B. Cockburn. 2016. SRAM memory margin probability failure estimation using Gaussian Process regression. In IEEE 34th International Conference on Computer Design (ICCD). 448--451."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"crossref","unstructured":"K. Scheibler F. Neubauer A. Mahdi M. Fr\u00e4nzle T. Teige T. Bienm\u00fcller D. Fehrer and B. Becker. 2016. Accurate ICP-based floating-point reasoning. In Formal Methods in Computer-Aided Design (FMCAD). 177--184.   K. Scheibler F. Neubauer A. Mahdi M. Fr\u00e4nzle T. Teige T. Bienm\u00fcller D. Fehrer and B. Becker. 2016. Accurate ICP-based floating-point reasoning. In Formal Methods in Computer-Aided Design (FMCAD). 177--184.","DOI":"10.1109\/FMCAD.2016.7886677"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2404895"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1162\/15324430152748236"}],"event":{"name":"DAC '18: The 55th Annual Design Automation Conference 2018","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE Council on Electronic Design Automation (CEDA)","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"San Francisco California","acronym":"DAC '18"},"container-title":["Proceedings of the 55th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3195970.3196059","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3195970.3196059","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:39:13Z","timestamp":1750210753000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3195970.3196059"}},"subtitle":["hybridizing formal methods and machine learning for verification of analog and mixed-signal circuits"],"short-title":[],"issued":{"date-parts":[[2018,6,24]]},"references-count":12,"alternative-id":["10.1145\/3195970.3196059","10.1145\/3195970"],"URL":"https:\/\/doi.org\/10.1145\/3195970.3196059","relation":{},"subject":[],"published":{"date-parts":[[2018,6,24]]},"assertion":[{"value":"2018-06-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}