{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:34:05Z","timestamp":1750221245924,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":16,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,6,24]],"date-time":"2018-06-24T00:00:00Z","timestamp":1529798400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,6,24]]},"DOI":"10.1145\/3195970.3196135","type":"proceedings-article","created":{"date-parts":[[2018,6,19]],"date-time":"2018-06-19T13:54:59Z","timestamp":1529416499000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Virtualsync"],"prefix":"10.1145","author":[{"given":"Grace Li","family":"Zhang","sequence":"first","affiliation":[{"name":"Technical University of Munich (TUM), Munich, Germany"}]},{"given":"Bing","family":"Li","sequence":"additional","affiliation":[{"name":"Technical University of Munich (TUM), Munich, Germany"}]},{"given":"Masanori","family":"Hashimoto","sequence":"additional","affiliation":[{"name":"Osaka University, Osaka, Japan"}]},{"given":"Ulf","family":"Schlichtmann","sequence":"additional","affiliation":[{"name":"Technical University of Munich (TUM), Munich, Germany"}]}],"member":"320","published-online":{"date-parts":[[2018,6,24]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/288548.289097"},{"key":"e_1_3_2_1_2_1","first-page":"724","volume-title":"Int. Conf. Comput.-Aided Des.","author":"Ozdal M. M.","year":"2011","unstructured":"M. M. Ozdal , S. Burns , and J. Hu , \" Gate sizing and device technology selection algorithms for high-performance industrial designs,\" in Proc . Int. Conf. Comput.-Aided Des. , 2011 , pp. 724 -- 731 . M. M. Ozdal, S. Burns, and J. Hu, \"Gate sizing and device technology selection algorithms for high-performance industrial designs,\" in Proc. Int. Conf. Comput.-Aided Des., 2011, pp. 724--731."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429428"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147149"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391604"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062312"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065694"},{"key":"e_1_3_2_1_8_1","first-page":"1457","volume-title":"Autom., and Test Europe Conf.","author":"Zhang G. L.","year":"2016","unstructured":"G. L. Zhang , B. Li , and U. Schlichtmann , \" Sampling-based buffer insertion for post-silicon yield improvement under process variability,\" in Proc. Design , Autom., and Test Europe Conf. , 2016 , pp. 1457 -- 1460 . G. L. Zhang, B. Li, and U. Schlichtmann, \"Sampling-based buffer insertion for post-silicon yield improvement under process variability,\" in Proc. Design, Autom., and Test Europe Conf., 2016, pp. 1457--1460."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898017"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2432143"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2702632"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2818713"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.711317"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.229730"},{"key":"e_1_3_2_1_15_1","first-page":"1306","volume-title":"Autom., and Test Europe Conf.","author":"Zografos O.","year":"2017","unstructured":"O. Zografos , A. D. Meester , E. Testa , M. Soeken , P. E. Gaillardon , G. D. Micheli , L. Amar\u00f9 , P. Raghavan , F. Catthoor , and R. Lauwereins , \" Wave pipelining for majority-based beyond-CMOS technologies,\" in Proc. Design , Autom., and Test Europe Conf. , 2017 , pp. 1306 -- 1311 . O. Zografos, A. D. Meester, E. Testa, M. Soeken, P. E. Gaillardon, G. D. Micheli, L. Amar\u00f9, P. Raghavan, F. Catthoor, and R. Lauwereins, \"Wave pipelining for majority-based beyond-CMOS technologies,\" in Proc. Design, Autom., and Test Europe Conf., 2017, pp. 1306--1311."},{"key":"e_1_3_2_1_16_1","first-page":"552","volume-title":"Int. Conf. Comput.-Aided Des.","author":"Sakallah K.","year":"1990","unstructured":"K. Sakallah , T. Mudge , and O. Olukotun , \" check Tc and min Tc: Timing verification and optimal clocking of synchronous digital circuits,\" in Proc . Int. Conf. Comput.-Aided Des. , 1990 , pp. 552 -- 555 . K. Sakallah, T. Mudge, and O. Olukotun, \"check Tc and min Tc: Timing verification and optimal clocking of synchronous digital circuits,\" in Proc. Int. Conf. Comput.-Aided Des., 1990, pp. 552--555."}],"event":{"name":"DAC '18: The 55th Annual Design Automation Conference 2018","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE Council on Electronic Design Automation (CEDA)","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"San Francisco California","acronym":"DAC '18"},"container-title":["Proceedings of the 55th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3195970.3196135","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3195970.3196135","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:07:40Z","timestamp":1750212460000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3195970.3196135"}},"subtitle":["timing optimization by synchronizing logic waves with sequential and combinational components as delay units"],"short-title":[],"issued":{"date-parts":[[2018,6,24]]},"references-count":16,"alternative-id":["10.1145\/3195970.3196135","10.1145\/3195970"],"URL":"https:\/\/doi.org\/10.1145\/3195970.3196135","relation":{},"subject":[],"published":{"date-parts":[[2018,6,24]]},"assertion":[{"value":"2018-06-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}