{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:32:44Z","timestamp":1750221164308,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":36,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,5,8]],"date-time":"2018-05-08T00:00:00Z","timestamp":1525737600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,5,8]]},"DOI":"10.1145\/3203217.3203280","type":"proceedings-article","created":{"date-parts":[[2018,7,26]],"date-time":"2018-07-26T11:58:06Z","timestamp":1532606286000},"page":"113-120","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Design space exploration for PIM architectures in 3D-stacked memories"],"prefix":"10.1145","author":[{"given":"Jo\u00e3o Paulo C.","family":"de Lima","sequence":"first","affiliation":[{"name":"Fed. University of Rio Grande do Sul, Porto Alegre, RS, Brazil"}]},{"given":"Paulo Cesar","family":"Santos","sequence":"additional","affiliation":[{"name":"Fed. University of Rio Grande do Sul, Porto Alegre, RS, Brazil"}]},{"given":"Marco A. Z.","family":"Alves","sequence":"additional","affiliation":[{"name":"Fed. University of Paran\u00e1, Curitiba, PR, Brazil"}]},{"given":"Antonio C. S.","family":"Beck","sequence":"additional","affiliation":[{"name":"Fed. University of Rio Grande do Sul, Porto Alegre, RS, Brazil"}]},{"given":"Luigi","family":"Carro","sequence":"additional","affiliation":[{"name":"Fed. University of Rio Grande do Sul, Porto Alegre, RS, Brazil"}]}],"member":"320","published-online":{"date-parts":[[2018,5,8]]},"reference":[{"volume-title":"Compute Caches. In Int. Symp. on High Performance Computer Architecture (HPCA). IEEE.","year":"2017","author":"Aga Shaizeen","key":"e_1_3_2_1_1_1"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750386"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750397"},{"volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","year":"2016","author":"Alves Marco AZ","key":"e_1_3_2_1_4_1"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-30695-7_2"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2086696.2086720"},{"volume-title":"Automation & Test in Europe Conference & Exhibition (DATE).","author":"Chen Ke","key":"e_1_3_2_1_7_1"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050511"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080233"},{"volume-title":"Thermal Feasibility of Die-Stacked Processing in Memory. In 2nd Workshop on Near-Data Processing (WoNDP).","author":"Eckert Yasuko","key":"e_1_3_2_1_10_1"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.748803"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446059"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037702"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.23"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2967938.2967958"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2007.5"},{"key":"e_1_3_2_1_17_1","unstructured":"Hybrid Memory Cube Consortium. 2013. Hybrid Memory Cube Specification Rev. 2.0. (2013). http:\/\/www.hybridmemorycube.org\/.  Hybrid Memory Cube Consortium. 2013. Hybrid Memory Cube Specification Rev. 2.0. (2013). http:\/\/www.hybridmemorycube.org\/."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242474"},{"volume-title":"Int. Conf. on Computer Design: VLSI in Computers and Processors.","author":"Kang Yi","key":"e_1_3_2_1_19_1"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132402.3132426"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.41"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"volume-title":"Workshop on Near-Data Processing.","year":"2013","author":"Loh Gabriel H","key":"e_1_3_2_1_23_1"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2015.10.012"},{"key":"e_1_3_2_1_25_1","unstructured":"Ravi Nair Samuel F Antao Carlo Bertolli Pradip Bose Jose R Brunheroto Tong Chen C-Y Cher Carlos HA Costa Jun Doi Constantinos Evangelinos et al. 2015. Active memory cube: A processing-in-memory architecture for exascale systems. IBM Journal of Research and Development 59 (2015).  Ravi Nair Samuel F Antao Carlo Bertolli Pradip Bose Jose R Brunheroto Tong Chen C-Y Cher Carlos HA Costa Jun Doi Constantinos Evangelinos et al. 2015. Active memory cube: A processing-in-memory architecture for exascale systems. IBM Journal of Research and Development 59 (2015)."},{"volume-title":"NIM: An HMC-Based Machine for Neuron Computation. In Int. Symp. on Applied Reconfigurable Computing (ARC). Springer.","year":"2017","author":"Oliveira Geraldo F.","key":"e_1_3_2_1_26_1"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.592312"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2011.7477494"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2014.6844483"},{"volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","author":"Santos Paulo C.","key":"e_1_3_2_1_30_1"},{"volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","year":"2017","author":"Santos Paulo C.","key":"e_1_3_2_1_31_1"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2016.08.001"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/2989081.2989087"},{"volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","year":"2015","author":"Weis Christian","key":"e_1_3_2_1_34_1"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/2600212.2600213"},{"volume-title":"Int. 3D Systems Integration Conference (3DIC)","author":"Zhu Qiuling","key":"e_1_3_2_1_36_1"}],"event":{"name":"CF '18: Computing Frontiers Conference","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"Ischia Italy","acronym":"CF '18"},"container-title":["Proceedings of the 15th ACM International Conference on Computing Frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3203217.3203280","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3203217.3203280","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:08:47Z","timestamp":1750208927000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3203217.3203280"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,5,8]]},"references-count":36,"alternative-id":["10.1145\/3203217.3203280","10.1145\/3203217"],"URL":"https:\/\/doi.org\/10.1145\/3203217.3203280","relation":{},"subject":[],"published":{"date-parts":[[2018,5,8]]},"assertion":[{"value":"2018-05-08","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}