{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,6]],"date-time":"2026-01-06T13:07:31Z","timestamp":1767704851586,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":25,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,7,15]],"date-time":"2018-07-15T00:00:00Z","timestamp":1531612800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,7,15]]},"DOI":"10.1145\/3229631.3229651","type":"proceedings-article","created":{"date-parts":[[2019,1,14]],"date-time":"2019-01-14T13:15:25Z","timestamp":1547471725000},"page":"97-104","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Simplifying HW\/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms"],"prefix":"10.1145","author":[{"given":"Lucas","family":"Bragan\u00e7a","sequence":"first","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Florestal, Minas Gerais, Brasil"}]},{"given":"Fredy","family":"Alves","sequence":"additional","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Florestal, Minas Gerais, Brasil"}]},{"given":"Jeronimo Costa","family":"Penha","sequence":"additional","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Vi\u00e7osa, Minas Gerais, Brasil"}]},{"given":"Gabriel","family":"Coimbra","sequence":"additional","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Florestal, Minas Gerais, Brasil"}]},{"given":"Ricardo","family":"Ferreira","sequence":"additional","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Vi\u00e7osa, Minas Gerais, Brasil"}]},{"given":"Jos\u00e9 Augusto M.","family":"Nacif","sequence":"additional","affiliation":[{"name":"Universidade Federal de Vi\u00e7osa, Florestal, Minas Gerais, Brasil"}]}],"member":"320","published-online":{"date-parts":[[2018,7,15]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2016.7760789"},{"volume-title":"Elastic Compute Cloud - Amazon EC2 - AWS. (apr","year":"2018","key":"e_1_3_2_1_2_1","unstructured":"Amazon. 2018. Elastic Compute Cloud - Amazon EC2 - AWS. (apr 2018 ). http:\/\/aws.amazon.com\/ec2\/ Amazon. 2018. Elastic Compute Cloud - Amazon EC2 - AWS. (apr 2018). http:\/\/aws.amazon.com\/ec2\/"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/RECONFIG.2017.8279791"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/3195638.3195647"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"crossref","unstructured":"Becker etal 2016. Spatial Programming with OpenSPL. Springer International Publishing 81--95.  Becker et al. 2016. Spatial Programming with OpenSPL. Springer International Publishing 81--95.","DOI":"10.1007\/978-3-319-26408-0_5"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2897972"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174269"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2016.117"},{"volume-title":"2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig). 1--6.","author":"F. A.","key":"e_1_3_2_1_9_1","unstructured":"F. A. M. Alves et al. 2017. Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform . In 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig). 1--6. F. A. M. Alves et al. 2017. Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform. In 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig). 1--6."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2996890.2996895"},{"volume-title":"The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems. In 2017 IEEE International Conference on Computer Design (ICCD).","author":"Di L.","key":"e_1_3_2_1_11_1","unstructured":"L. Di Tucci et al. 2017 . The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems. In 2017 IEEE International Conference on Computer Design (ICCD). L. Di Tucci et al. 2017. The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems. In 2017 IEEE International Conference on Computer Design (ICCD)."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174258"},{"volume-title":"The SMEM Seeding Acceleration for DNA Sequence Alignment. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).","author":"M. C.","key":"e_1_3_2_1_13_1","unstructured":"M. C. F. Chang et al. 2016 . The SMEM Seeding Acceleration for DNA Sequence Alignment. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). M. C. F. Chang et al. 2016. The SMEM Seeding Acceleration for DNA Sequence Alignment. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)."},{"key":"e_1_3_2_1_14_1","first-page":"1","article-title":"2018. Guest Editors; Introduction","volume":"35","author":"Ozdal M.","year":"2018","unstructured":"M. Ozdal 2018. Guest Editors; Introduction : Hardware Accelerators for Data Centers. IEEE Design Test 35 , 1 ( 2018 ), 5--6. M. Ozdal et al. 2018. Guest Editors; Introduction: Hardware Accelerators for Data Centers. IEEE Design Test 35, 1 (2018), 5--6.","journal-title":"Hardware Accelerators for Data Centers. IEEE Design Test"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2017.8091025"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174262"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847269"},{"key":"e_1_3_2_1_18_1","volume-title":"26th International Conference on Field Programmable Logic and Applications, Keynote - Slides","author":"Gupta PK","year":"2016","unstructured":"PK Gupta . 2016 . Accelerating datacenter workloads . In 26th International Conference on Field Programmable Logic and Applications, Keynote - Slides available at www.fpl2016.org. PK Gupta. 2016. Accelerating datacenter workloads. In 26th International Conference on Field Programmable Logic and Applications, Keynote - Slides available at www.fpl2016.org."},{"key":"e_1_3_2_1_19_1","unstructured":"Intel. 2017. AOCL Programming Guide. (2017). https:\/\/www.altera.com\/content\/dam\/altera-www\/global\/en_US\/pdfs\/literature\/hb\/opencl-sdk\/aocl_programming_guide.pdf  Intel. 2017. AOCL Programming Guide. (2017). https:\/\/www.altera.com\/content\/dam\/altera-www\/global\/en_US\/pdfs\/literature\/hb\/opencl-sdk\/aocl_programming_guide.pdf"},{"volume-title":"Runtime Parameterizable Regular Expression Operators for Databases. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).","author":"Istv\u00e1n Z.","key":"e_1_3_2_1_20_1","unstructured":"Z. Istv\u00e1n , D. Sidler , and G. Alonso . 2016 . Runtime Parameterizable Regular Expression Operators for Databases. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). Z. Istv\u00e1n, D. Sidler, and G. Alonso. 2016. Runtime Parameterizable Regular Expression Operators for Databases. In 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)."},{"key":"e_1_3_2_1_21_1","unstructured":"ENNO LUEBBERS. 2017. OPAE. (Nov 2017). https:\/\/01.org\/OPAE  ENNO LUEBBERS. 2017. OPAE. (Nov 2017). https:\/\/01.org\/OPAE"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174247"},{"volume-title":"Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL. (04","year":"2015","key":"e_1_3_2_1_23_1","unstructured":"Shinya Takamaeda-Yamazaki. 2015 . Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL. (04 2015). Shinya Takamaeda-Yamazaki. 2015. Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL. (04 2015)."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021727"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174248"}],"event":{"name":"SAMOS XVIII: Architectures, Modeling, and Simulation","acronym":"SAMOS XVIII","location":"Pythagorion Greece"},"container-title":["Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3229631.3229651","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3229631.3229651","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:07:38Z","timestamp":1750212458000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3229631.3229651"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7,15]]},"references-count":25,"alternative-id":["10.1145\/3229631.3229651","10.1145\/3229631"],"URL":"https:\/\/doi.org\/10.1145\/3229631.3229651","relation":{},"subject":[],"published":{"date-parts":[[2018,7,15]]},"assertion":[{"value":"2018-07-15","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}