{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:33:33Z","timestamp":1750221213912,"version":"3.41.0"},"reference-count":30,"publisher":"Association for Computing Machinery (ACM)","issue":"9","license":[{"start":{"date-parts":[[2018,8,22]],"date-time":"2018-08-22T00:00:00Z","timestamp":1534896000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Commun. ACM"],"published-print":{"date-parts":[[2018,8,22]]},"abstract":"<jats:p>The \"new Dark Silicon\" model benchmarks transistor technologies at the architectural level for multi-core processors.<\/jats:p>","DOI":"10.1145\/3230628","type":"journal-article","created":{"date-parts":[[2018,8,23]],"date-time":"2018-08-23T11:48:27Z","timestamp":1535024907000},"page":"60-69","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Can beyond-CMOS devices illuminate dark silicon?"],"prefix":"10.1145","volume":"61","author":[{"given":"Robert","family":"Perricone","sequence":"first","affiliation":[{"name":"University of Notre Dame, Notre Dame, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"X. Sharon","family":"Hu","sequence":"additional","affiliation":[{"name":"University of Notre Dame, Notre Dame, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Joseph","family":"Nahas","sequence":"additional","affiliation":[{"name":"University of Notre Dame, Notre Dame, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael","family":"Niemier","sequence":"additional","affiliation":[{"name":"University of Notre Dame, Notre Dame, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,8,22]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2066530"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.782564"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278480.1278667"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2010.5496640"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050511"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000108"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.42"},{"key":"e_1_2_1_9_1","unstructured":"International Technology Roadmap for Semiconductors; http:\/\/www.itrs2.net  International Technology Roadmap for Semiconductors; http:\/\/www.itrs2.net"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2014.2372934"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/857203.858165"},{"volume-title":"Proceedings of Innovative Architecture for Future-Generation High-Performance Processors and Systems","year":"2004","author":"Kodaka T.","key":"e_1_2_1_12_1"},{"volume-title":"Proceedings of the ACM\/IEEE International Symposium on Microarchitecture. IEEE Computer Society Press","year":"1997","author":"Lee C.","key":"e_1_2_1_13_1"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2015.2493759"},{"volume-title":"Proceedings of the IEEE International Workload Characterization Symposium. IEEE Press","year":"2005","author":"Li M.-L.","key":"e_1_2_1_15_1"},{"key":"e_1_2_1_16_1","doi-asserted-by":"crossref","unstructured":"Li W. Sharmin S. Ilatikhameneh H. Rahman R. Lu Y. Wang J. Yan X. Seabaugh A. Klimeck G. Jena D. and Fay P. Polarization-engineered III-Nitride heterojunction tunnel field-effect transistors. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Dec. 2015) 28--34.  Li W. Sharmin S. Ilatikhameneh H. Rahman R. Lu Y. Wang J. Yan X. Seabaugh A. Klimeck G. Jena D. and Fay P. Polarization-engineered III-Nitride heterojunction tunnel field-effect transistors. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Dec. 2015) 28--34.","DOI":"10.1109\/JXCDC.2015.2426433"},{"key":"e_1_2_1_17_1","first-page":"8","volume":"38","author":"Moore G.","year":"1965","journal-title":"Electronics"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2013.2252317"},{"key":"e_1_2_1_19_1","doi-asserted-by":"crossref","unstructured":"Nikonov D. and Young I. Benchmarking of beyond-CMOS exploratory devices for logic integrated circuits. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Dec. 2015) 3--11.  Nikonov D. and Young I. Benchmarking of beyond-CMOS exploratory devices for logic integrated circuits. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Dec. 2015) 3--11.","DOI":"10.1109\/JXCDC.2015.2418033"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl071804g"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070470"},{"key":"e_1_2_1_22_1","unstructured":"Sohoni S. Improving L2 Cache Performance through Stream-Directed Optimizations. Ph.D. thesis University of Cincinnati Cincinnati OH 2004; http:\/\/rave.ohiolink.edu\/etdc\/view?acc_num=ucin1092932892   Sohoni S. Improving L2 Cache Performance through Stream-Directed Optimizations. Ph.D. thesis University of Cincinnati Cincinnati OH 2004; http:\/\/rave.ohiolink.edu\/etdc\/view?acc_num=ucin1092932892"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/378420.378784"},{"key":"e_1_2_1_24_1","unstructured":"Standard Performance Evaluation Corporation; http:\/\/www.spec.org  Standard Performance Evaluation Corporation; http:\/\/www.spec.org"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/2016802.2016859"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.75"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228567"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1735970.1736044"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl403419e"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488835"}],"container-title":["Communications of the ACM"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3230628","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3230628","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:39:47Z","timestamp":1750210787000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3230628"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,8,22]]},"references-count":30,"journal-issue":{"issue":"9","published-print":{"date-parts":[[2018,8,22]]}},"alternative-id":["10.1145\/3230628"],"URL":"https:\/\/doi.org\/10.1145\/3230628","relation":{},"ISSN":["0001-0782","1557-7317"],"issn-type":[{"type":"print","value":"0001-0782"},{"type":"electronic","value":"1557-7317"}],"subject":[],"published":{"date-parts":[[2018,8,22]]},"assertion":[{"value":"2018-08-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}