{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:32:44Z","timestamp":1750221164072,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,7,17]],"date-time":"2018-07-17T00:00:00Z","timestamp":1531785600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100007601","name":"Horizon 2020 Framework Programme","doi-asserted-by":"publisher","award":["754337"],"award-info":[{"award-number":["754337"]}],"id":[{"id":"10.13039\/501100007601","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,7,17]]},"DOI":"10.1145\/3232195.3232203","type":"proceedings-article","created":{"date-parts":[[2018,12,21]],"date-time":"2018-12-21T13:33:51Z","timestamp":1545399231000},"page":"124-130","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies"],"prefix":"10.1145","author":[{"given":"Eleni","family":"Maragkoudaki","sequence":"first","affiliation":[{"name":"University of Manchester, Manchester, UK"}]},{"given":"Przemyslaw","family":"Mroszczyk","sequence":"additional","affiliation":[{"name":"University of Manchester, Manchester, UK"}]},{"given":"Vasilis F.","family":"Pavlidis","sequence":"additional","affiliation":[{"name":"University of Manchester, Manchester, UK"}]}],"member":"320","published-online":{"date-parts":[[2018,7,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JLT.2013.2283277"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.293111"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1941487.1941507"},{"key":"e_1_3_2_1_4_1","volume-title":"Three-Dimensional Integrated Circuit Design","author":"Pavlidis V. F.","year":"2017","unstructured":"V. F. Pavlidis , I. Savidis , and E. G. Friedman , Three-Dimensional Integrated Circuit Design 2 nd Edition, Morgan Kaufmann Publishers , 2017 . V. F. Pavlidis, I. Savidis, and E. G. Friedman, Three-Dimensional Integrated Circuit Design 2nd Edition, Morgan Kaufmann Publishers, 2017.","edition":"2"},{"key":"e_1_3_2_1_5_1","unstructured":"High Bandwidth Memory | AMD website https:\/\/www.amd.com\/en\/technologies\/hbm.  High Bandwidth Memory | AMD website https:\/\/www.amd.com\/en\/technologies\/hbm."},{"key":"e_1_3_2_1_6_1","first-page":"1088","article-title":"Studies on Electrical Performance and Thermal Stress of a Silicon Interposer with TSVs","author":"Sunohara M.","year":"2010","unstructured":"M. Sunohara , \" Studies on Electrical Performance and Thermal Stress of a Silicon Interposer with TSVs ,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 1088 -- 1093 , June 2010 . M. Sunohara et al., \"Studies on Electrical Performance and Thermal Stress of a Silicon Interposer with TSVs,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 1088--1093, June 2010.","journal-title":"Proceedings of the IEEE Electronic Components and Technology Conference"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2017.2659700"},{"key":"e_1_3_2_1_8_1","first-page":"301","volume-title":"Proceedings of the IEEE Electronic Components and Technology Conference","author":"Wu Z.","year":"2015","unstructured":"Z. Wu CTE Organic Interposers at 40μm I\/ O Pitch ,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 301 -- 307 , May 2015 . Z. Wu et al., \"Modeling, Design and Fabrication of Ultra-thin and Low CTE Organic Interposers at 40μm I\/O Pitch,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 301--307, May 2015."},{"key":"e_1_3_2_1_9_1","first-page":"348","volume-title":"Proceedings of the IEEE Electronic Components and Technology Conference","author":"Oi K.","year":"2014","unstructured":"K. Oi D Package with Novel Integrated Organic Interposer Substrate with Ultra-fine Wiring and High Density Bumps,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 348 -- 353 , May 2014 . K. Oi et al., \"Development of New 2.5D Package with Novel Integrated Organic Interposer Substrate with Ultra-fine Wiring and High Density Bumps,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 348--353, May 2014."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.845893"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.833667"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2004549"},{"key":"e_1_3_2_1_13_1","first-page":"369","article-title":"Low Swing Signaling Using a Dynamic Diode-Connected Driver","author":"Ferretti M.","year":"2001","unstructured":"M. Ferretti and P. A. Beerel , \" Low Swing Signaling Using a Dynamic Diode-Connected Driver ,\" Proceedings of the IEEE European Solid-State Circuits Conference , pp. 369 -- 372 , September 2001 . M. Ferretti and P. A. Beerel, \"Low Swing Signaling Using a Dynamic Diode-Connected Driver,\" Proceedings of the IEEE European Solid-State Circuits Conference, pp. 369--372, September 2001.","journal-title":"Proceedings of the IEEE European Solid-State Circuits Conference"},{"key":"e_1_3_2_1_14_1","first-page":"881","article-title":"Adaptive Low\/High Voltage Swing CMOS Driver for On-Chip Interconnects","author":"Garcia J. C.","year":"2007","unstructured":"J. C. Garcia , J. A. Montiel-Nelson , and S. Nooshabadi , \" Adaptive Low\/High Voltage Swing CMOS Driver for On-Chip Interconnects ,\" Proceedings of the IEEE International Symposium on Circuits and Systems , pp. 881 -- 884 , May 2007 . J. C. Garcia, J. A. Montiel-Nelson, and S. Nooshabadi, \"Adaptive Low\/High Voltage Swing CMOS Driver for On-Chip Interconnects,\" Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 881--884, May 2007.","journal-title":"Proceedings of the IEEE International Symposium on Circuits and Systems"},{"key":"e_1_3_2_1_15_1","first-page":"77","article-title":"Interconnect Design Tradeoffs for Silicon and Glass Interposers","author":"Kalargaris H.","year":"2014","unstructured":"H. Kalargaris and V. F. Pavlidis , \" Interconnect Design Tradeoffs for Silicon and Glass Interposers ,\" Proceedings of the IEEE New Circuits and Systems Conference , pp. 77 -- 80 , June 2014 . H. Kalargaris and V. F. Pavlidis, \"Interconnect Design Tradeoffs for Silicon and Glass Interposers,\" Proceedings of the IEEE New Circuits and Systems Conference, pp. 77--80, June 2014.","journal-title":"Proceedings of the IEEE New Circuits and Systems Conference"},{"key":"e_1_3_2_1_16_1","first-page":"86","article-title":"Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme","author":"Jangam S.","year":"2017","unstructured":"S. Jangam , \" Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme ,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 86 -- 94 , May 2017 . S. Jangam et al., \"Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 86--94, May 2017.","journal-title":"Proceedings of the IEEE Electronic Components and Technology Conference"},{"key":"e_1_3_2_1_17_1","first-page":"262","article-title":"Ultra-Low Swing CMOS Transceiver for 2.5-D Integrated Systems","author":"Mroszczyk P.","year":"2018","unstructured":"P. Mroszczyk and V. F. Pavlidis , \" Ultra-Low Swing CMOS Transceiver for 2.5-D Integrated Systems ,\" Proceedings of the IEEE International Symposium on Quality Electronic Design , pp. 262 -- 267 , March 2018 . P. Mroszczyk and V. F. Pavlidis, \"Ultra-Low Swing CMOS Transceiver for 2.5-D Integrated Systems,\" Proceedings of the IEEE International Symposium on Quality Electronic Design, pp. 262--267, March 2018.","journal-title":"Proceedings of the IEEE International Symposium on Quality Electronic Design"},{"key":"e_1_3_2_1_18_1","unstructured":"Predictive Technology Model (PTM) website http:\/\/ptm.asu.edu\/.  Predictive Technology Model (PTM) website http:\/\/ptm.asu.edu\/."},{"key":"e_1_3_2_1_19_1","first-page":"860","article-title":"Power Comparison of 2D, 3D and 2.5D Interconnect Solutions and Power Optimization of Interposer Interconnects","author":"Karim M. A.","year":"2013","unstructured":"M. A. Karim , P. D. Franzon , and A. Kumar , \" Power Comparison of 2D, 3D and 2.5D Interconnect Solutions and Power Optimization of Interposer Interconnects ,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 860 -- 866 , May 2013 . M. A. Karim, P. D. Franzon, and A. Kumar, \"Power Comparison of 2D, 3D and 2.5D Interconnect Solutions and Power Optimization of Interposer Interconnects,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 860--866, May 2013.","journal-title":"Proceedings of the IEEE Electronic Components and Technology Conference"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/66.827350"},{"key":"e_1_3_2_1_21_1","first-page":"1806","volume-title":"Proceedings of the IEEE Electronic Components and Technology Conference","author":"Lee M.","year":"2013","unstructured":"M. Lee Proceedings of the IEEE Electronic Components and Technology Conference , pp. 1806 -- 1810 , May 2013 . M. Lee et al., \"Noise Coupling of Through-Via in Silicon and Glass Interposer,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 1806--1810, May 2013."},{"key":"e_1_3_2_1_22_1","first-page":"738","volume-title":"Proceedings of the IEEE Electronic Components and Technology Conference","author":"Kim Y.","year":"2015","unstructured":"Y. Kim D Integrated Circuits (ICs) with Glass, Silicon and Organic Interposer,\" Proceedings of the IEEE Electronic Components and Technology Conference , pp. 738 -- 743 , May 2015 . Y. Kim et al., \"Signal and Power Integrity Analysis in 2.5D Integrated Circuits (ICs) with Glass, Silicon and Organic Interposer,\" Proceedings of the IEEE Electronic Components and Technology Conference, pp. 738--743, May 2015."}],"event":{"name":"NANOARCH '18: IEEE\/ACM International Symposium on Nanoscale Architectures","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CS"],"location":"Athens Greece","acronym":"NANOARCH '18"},"container-title":["Proceedings of the 14th IEEE\/ACM International Symposium on Nanoscale Architectures"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3232195.3232203","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3232195.3232203","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:08:46Z","timestamp":1750208926000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3232195.3232203"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7,17]]},"references-count":22,"alternative-id":["10.1145\/3232195.3232203","10.1145\/3232195"],"URL":"https:\/\/doi.org\/10.1145\/3232195.3232203","relation":{},"subject":[],"published":{"date-parts":[[2018,7,17]]},"assertion":[{"value":"2018-07-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}