{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:33:30Z","timestamp":1750221210496,"version":"3.41.0"},"reference-count":18,"publisher":"Association for Computing Machinery (ACM)","issue":"6","license":[{"start":{"date-parts":[[2018,11,6]],"date-time":"2018-11-06T00:00:00Z","timestamp":1541462400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2018,11,30]]},"abstract":"<jats:p>We present a primal-dual approximation algorithm for minimizing the leakage power of an integrated circuit by assigning gate threshold voltages. While most existing techniques do not provide a performance guarantee, we prove an upper bound on the power consumption.<\/jats:p>\n          <jats:p>The algorithm is practical and works with an industrial sign-off timer. It can be used for post-routing power reduction or for optimizing leakage power throughout the design flow.<\/jats:p>\n          <jats:p>We demonstrate the practical performance on recent microprocessor units. Our implementation obtains significant leakage power reductions of up to 8% on top of one of the most successful algorithms for gate sizing and threshold voltage optimization. After timing-aware global routing, we achieve leakage power reductions of up to 34%.<\/jats:p>","DOI":"10.1145\/3232538","type":"journal-article","created":{"date-parts":[[2018,11,6]],"date-time":"2018-11-06T13:36:47Z","timestamp":1541511407000},"page":"1-16","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["An Approximation Algorithm for Threshold Voltage Optimization"],"prefix":"10.1145","volume":"23","author":[{"given":"Siad","family":"Daboul","sequence":"first","affiliation":[{"name":"University of Bonn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stephan","family":"Held","sequence":"additional","affiliation":[{"name":"University of Bonn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jens","family":"Vygen","sequence":"additional","affiliation":[{"name":"University of Bonn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sonja","family":"Wittke","sequence":"additional","affiliation":[{"name":"University of Bonn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,11,6]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024829"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/0196-6774(81)90020-1"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.4007\/annals.2005.162.439"},{"volume-title":"Proc. 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