{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T06:04:47Z","timestamp":1767852287954,"version":"3.49.0"},"reference-count":42,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2018,8,24]],"date-time":"2018-08-24T00:00:00Z","timestamp":1535068800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100014438","name":"Business Finland","doi-asserted-by":"crossref","award":["FiDiPro 40142\/14"],"award-info":[{"award-number":["FiDiPro 40142\/14"]}],"id":[{"id":"10.13039\/501100014438","id-type":"DOI","asserted-by":"crossref"}]},{"name":"HSA Foundation"},{"name":"Tampere University of Technology Graduate School"},{"DOI":"10.13039\/501100002341","name":"Academy of Finland","doi-asserted-by":"crossref","award":["297548"],"award-info":[{"award-number":["297548"]}],"id":[{"id":"10.13039\/501100002341","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Proc. ACM Comput. Graph. Interact. Tech."],"published-print":{"date-parts":[[2018,8,24]]},"abstract":"<jats:p>In the near future, GPUs are expected to have hardware support for real-time ray tracing in order to, e.g., help render complex lighting effects in video games and enable photorealistic augmented reality. One challenge in real-time ray tracing is dynamic scene support, that is, rebuilding or updating the spatial data structures used to accelerate rendering whenever the scene geometry changes. This paper proposes PLOCTree, an accelerator for tree construction based on the Parallel Locally-Ordered Clustering (PLOC) algorithm. Tree construction is highly memory-intensive, thus for the hardware implementation, the algorithm is rewritten into a bandwidth-economical form which converts most of the external memory traffic of the original software-based GPU implementation into streaming on-chip data traffic. As a result, the proposed unit is 3.9 times faster and uses 7.7 times less memory bandwidth than the GPU implementation. Compared to state-of-the-art hardware builders, PLOCTree gives a superior performance-quality tradeoff: it is nearly as fast as a state-of-the-art low-quality linear builder, while producing trees of similar Surface Area Heuristic (SAH) cost as a comparatively expensive binned SAH sweep builder.<\/jats:p>","DOI":"10.1145\/3233309","type":"journal-article","created":{"date-parts":[[2018,8,24]],"date-time":"2018-08-24T12:02:38Z","timestamp":1535112158000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["PLOCTree"],"prefix":"10.1145","volume":"1","author":[{"given":"Timo","family":"Viitanen","sequence":"first","affiliation":[{"name":"Tampere University of Technology, Tampere, Finland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matias","family":"Koskela","sequence":"additional","affiliation":[{"name":"Tampere University of Technology, Tampere, Finland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pekka","family":"J\u00e4\u00e4skel\u00e4inen","sequence":"additional","affiliation":[{"name":"Tampere University of Technology, Tampere, Finland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aleksi","family":"Tervo","sequence":"additional","affiliation":[{"name":"Tampere University of Technology, Tampere, Finland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jarmo","family":"Takala","sequence":"additional","affiliation":[{"name":"Tampere University of Technology, Tampere, Finland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,8,24]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/2492045.2492056"},{"key":"e_1_2_1_2_1","volume-title":"Proc. Computer Graphics and Visual Computing.","author":"Apetrei Ciprian","year":"2014","unstructured":"Ciprian Apetrei . 2014 . Fast and simple agglomerative LBVH construction . In Proc. Computer Graphics and Visual Computing. Ciprian Apetrei. 2014. Fast and simple agglomerative LBVH construction. In Proc. Computer Graphics and Visual Computing."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1111\/cgf.12581"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2554688.2554787"},{"key":"e_1_2_1_5_1","volume-title":"Retrieved","author":"Chandrasekar Karthik","year":"2012","unstructured":"Karthik Chandrasekar , Christian Weis , Yonghui Li , Benny Akesson , Norbert Wehn , and Kees Goossens . 2012 . DRAMPower: Open-source DRAM power 8 energy estimation tool . Retrieved Feb 30, 2017 from http:\/\/www.drampower.info Karthik Chandrasekar, Christian Weis, Yonghui Li, Benny Akesson, Norbert Wehn, and Kees Goossens. 2012. DRAMPower: Open-source DRAM power 8 energy estimation tool. Retrieved Feb 30, 2017 from http:\/\/www.drampower.info"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3104067"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2790060.2790065"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2790060.2790065"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2461912.2462025"},{"key":"e_1_2_1_10_1","volume-title":"Evaluation of a BVH construction accelerator architecture for high-quality visualization","author":"Doyle Michael","year":"2017","unstructured":"Michael Doyle , Ciaran Tuohy , and Michael Manzke . 2017. Evaluation of a BVH construction accelerator architecture for high-quality visualization . IEEE Transactions on Multi-Scale Computing Systems ( 2017 ). Michael Doyle, Ciaran Tuohy, and Michael Manzke. 2017. Evaluation of a BVH construction accelerator architecture for high-quality visualization. IEEE Transactions on Multi-Scale Computing Systems (2017)."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2018323.2018333"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2492045.2492054"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815968"},{"key":"e_1_2_1_14_1","volume-title":"Inside Pascal: NVIDIA's newest computing platform. Retrieved","author":"Harris Mark","year":"2016","unstructured":"Mark Harris . 2016 . Inside Pascal: NVIDIA's newest computing platform. Retrieved April 9, 2018 from https:\/\/devblogs.nvidia.com\/inside-pascal\/ Mark Harris. 2016. Inside Pascal: NVIDIA's newest computing platform. Retrieved April 9, 2018 from https:\/\/devblogs.nvidia.com\/inside-pascal\/"},{"key":"e_1_2_1_15_1","volume-title":"Proc. Eurographics Conf. Parallel Graphics and Visualization. 101--108","author":"Ize Thiago","year":"2007","unstructured":"Thiago Ize , Ingo Wald , and Steven G Parker . 2007 . Asynchronous BVH construction for ray tracing dynamic scenes on parallel multi-core architectures . In Proc. Eurographics Conf. Parallel Graphics and Visualization. 101--108 . Thiago Ize, Ingo Wald, and Steven G Parker. 2007. Asynchronous BVH construction for ray tracing dynamic scenes on parallel multi-core architectures. In Proc. Eurographics Conf. Parallel Graphics and Visualization. 101--108."},{"key":"e_1_2_1_16_1","volume-title":"Proc. High-Performance Graphics. 33--37","author":"Karras Tero","year":"2012","unstructured":"Tero Karras . 2012 . Maximizing parallelism in the construction of BVHs, octrees, and k-d trees . In Proc. High-Performance Graphics. 33--37 . Tero Karras. 2012. Maximizing parallelism in the construction of BVHs, octrees, and k-d trees. In Proc. High-Performance Graphics. 33--37."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2492045.2492055"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.5555\/2980009.2980013"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2414456"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2159616.2159649"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1111\/j.1467-8659.2009.01377.x"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2017.8167762"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.5555\/2132325.2132479"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.5555\/2755753.2757181"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01911006"},{"key":"e_1_2_1_26_1","unstructured":"James McCombe. 2014. New Techniques Made Possible by PowerVR Ray Tracing Hardware. GDC Talk.  James McCombe. 2014. New Techniques Made Possible by PowerVR Ray Tracing Hardware. GDC Talk."},{"key":"e_1_2_1_27_1","volume-title":"Game Developers Conference Talk.","author":"McGuire Morgan","year":"2018","unstructured":"Morgan McGuire , Petrik Clarberg , and Nir Benty . 2018 . The ray + raster era begins - an R8D roadmap for the game industry. (2018) . Game Developers Conference Talk. Morgan McGuire, Petrik Clarberg, and Nir Benty. 2018. The ray + raster era begins - an R8D roadmap for the game industry. (2018). Game Developers Conference Talk."},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVCG.2017.2669983"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVCG.2014.2371855"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/2629634"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2070781.2024194"},{"key":"e_1_2_1_32_1","volume-title":"Proc. High-Performance Graphics. 87--95","author":"Pantaleoni Jacopo","year":"2010","unstructured":"Jacopo Pantaleoni and David Luebke . 2010 . HLBVH: Hierarchical LBVH construction for real-time ray tracing of dynamic geometry . In Proc. High-Performance Graphics. 87--95 . Jacopo Pantaleoni and David Luebke. 2010. HLBVH: Hierarchical LBVH construction for real-time ray tracing of dynamic geometry. In Proc. High-Performance Graphics. 87--95."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593151"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/3105762.3105771"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.5555\/2977336.2977342"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132702"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/3105762.3105782"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/RT.2007.4342588"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/1189762.1206075"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/RT.2008.4634626"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/RT.2006.280209"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073204.1073211"}],"container-title":["Proceedings of the ACM on Computer Graphics and Interactive Techniques"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3233309","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3233309","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:13:12Z","timestamp":1750212792000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3233309"}},"subtitle":["A Fast, High-Quality Hardware BVH Builder"],"short-title":[],"issued":{"date-parts":[[2018,8,24]]},"references-count":42,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2018,8,24]]}},"alternative-id":["10.1145\/3233309"],"URL":"https:\/\/doi.org\/10.1145\/3233309","relation":{},"ISSN":["2577-6193"],"issn-type":[{"value":"2577-6193","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,8,24]]},"assertion":[{"value":"2018-08-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}