{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:30:37Z","timestamp":1750221037412,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":14,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T00:00:00Z","timestamp":1538352000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1145\/3240302.3240321","type":"proceedings-article","created":{"date-parts":[[2019,1,4]],"date-time":"2019-01-04T13:33:56Z","timestamp":1546608836000},"page":"161-168","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Linking parallel algorithmic thinking to many-core memory systems and speedups for boosted decision trees"],"prefix":"10.1145","author":[{"given":"James A.","family":"Edwards","sequence":"first","affiliation":[{"name":"University of Maryland"}]},{"given":"Uzi","family":"Vishkin","sequence":"additional","affiliation":[{"name":"University of Maryland"}]}],"member":"320","published-online":{"date-parts":[[2018,10]]},"reference":[{"volume-title":"IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).","author":"Bakhoda Ali","key":"e_1_3_2_1_1_1","unstructured":"Ali Bakhoda , George Yuan , Wilson W. L. Fung , Henry Wong , and Tor M. Aamodt . 2009. Analyzing CUDA Workloads Using a Detailed GPU Simulator . In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). Ali Bakhoda, George Yuan, Wilson W. L. Fung, Henry Wong, and Tor M. Aamodt. 2009. Analyzing CUDA Workloads Using a Detailed GPU Simulator. In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2939672.2939785"},{"key":"e_1_3_2_1_3_1","unstructured":"Intel Corporation. 2015. The Compute Architecture of Intel Processor Graphics Gen9. https:\/\/software.intel.com\/sites\/default\/files\/managed\/c5\/9a\/The-Compute-Architecture-of-Intel-Processor-Graphics-Gen9-v1d0.pdf  Intel Corporation. 2015. The Compute Architecture of Intel Processor Graphics Gen9. https:\/\/software.intel.com\/sites\/default\/files\/managed\/c5\/9a\/The-Compute-Architecture-of-Intel-Processor-Graphics-Gen9-v1d0.pdf"},{"key":"e_1_3_2_1_4_1","volume-title":"Technical Report. The International Symposium on Asynchronous Circuits and Systems (ASYNC). http:\/\/asyncsymposium.org\/async2009\/slides\/dally-async2009","author":"Dally W.J.","year":"2009","unstructured":"W.J. Dally . 2009 . The end of denial architecture . Technical Report. The International Symposium on Asynchronous Circuits and Systems (ASYNC). http:\/\/asyncsymposium.org\/async2009\/slides\/dally-async2009 .pdf. W.J. Dally. 2009. The end of denial architecture. Technical Report. The International Symposium on Asynchronous Circuits and Systems (ASYNC). http:\/\/asyncsymposium.org\/async2009\/slides\/dally-async2009.pdf."},{"key":"e_1_3_2_1_5_1","volume-title":"Unified Streaming Multiprocessor Memory. Patent No. US 9,069,664 B2,Filed Sep. 22nd","author":"Dally William James","year":"2011","unstructured":"William James Dally . 2015. Unified Streaming Multiprocessor Memory. Patent No. US 9,069,664 B2,Filed Sep. 22nd ., 2011 , Issued June 30th., 2015. William James Dally. 2015. Unified Streaming Multiprocessor Memory. Patent No. US 9,069,664 B2,Filed Sep. 22nd., 2011, Issued June 30th., 2015."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2017.2754376"},{"key":"e_1_3_2_1_7_1","volume-title":"Patterson","author":"Hennessy John L.","year":"2017","unstructured":"John L. Hennessy and David A . Patterson . 2017 . Computer Architecture, Sixth Edition : A Quantitative Approach (6th ed.). Morgan Kaufmann Publishers Inc ., San Francisco, CA, USA. John L. Hennessy and David A. Patterson. 2017. Computer Architecture, Sixth Edition: A Quantitative Approach (6th ed.). Morgan Kaufmann Publishers Inc., San Francisco, CA, USA."},{"key":"e_1_3_2_1_8_1","first-page":"55","article-title":"Faster Gradient-Boosting Decision Trees","volume":"33","author":"Hu Ying","year":"2018","unstructured":"Ying Hu , Oleg Kremnyov , and Ivan Kuzmin . 2018 . Faster Gradient-Boosting Decision Trees . The Parallel Universe 33 (2018), 55 -- 62 . https:\/\/techdecoded.intel.io\/resources\/faster-gradient-boosting-decision-trees\/ Ying Hu, Oleg Kremnyov, and Ivan Kuzmin. 2018. Faster Gradient-Boosting Decision Trees. The Parallel Universe 33 (2018), 55--62. https:\/\/techdecoded.intel.io\/resources\/faster-gradient-boosting-decision-trees\/","journal-title":"The Parallel Universe"},{"key":"e_1_3_2_1_9_1","unstructured":"Kaggle Inc. 2014. Higgs Boson Machine Learning Challenge. https:\/\/www.kaggle.com\/c\/higgs-boson  Kaggle Inc. 2014. Higgs Boson Machine Learning Challenge. https:\/\/www.kaggle.com\/c\/higgs-boson"},{"key":"e_1_3_2_1_10_1","volume-title":"Accelerating the XGBoost algorithm using GPU computing. PeerJ Computer Science 3 (July","author":"Mitchell Rory","year":"2017","unstructured":"Rory Mitchell and Eibe Frank . 2017. Accelerating the XGBoost algorithm using GPU computing. PeerJ Computer Science 3 (July 2017 ), e127. Rory Mitchell and Eibe Frank. 2017. Accelerating the XGBoost algorithm using GPU computing. PeerJ Computer Science 3 (July 2017), e127."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.14778\/1687553.1687569"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1963405.1963461"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1866739.1866757"},{"key":"e_1_3_2_1_14_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE).","author":"Zakharenko Vitaly","year":"2013","unstructured":"Vitaly Zakharenko , Tor Aamodt , and Andreas Moshovos . 2013 . Characterizing the Performance Benefits of Fused CPU\/GPU Systems Using FusionSim. In Design , Automation & Test in Europe Conference & Exhibition (DATE). Vitaly Zakharenko, Tor Aamodt, and Andreas Moshovos. 2013. Characterizing the Performance Benefits of Fused CPU\/GPU Systems Using FusionSim. In Design, Automation & Test in Europe Conference & Exhibition (DATE)."}],"event":{"name":"MEMSYS '18: The International Symposium on Memory Systems","acronym":"MEMSYS '18","location":"Alexandria Virginia USA"},"container-title":["Proceedings of the International Symposium on Memory Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240302.3240321","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3240302.3240321","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:43:42Z","timestamp":1750207422000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240302.3240321"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":14,"alternative-id":["10.1145\/3240302.3240321","10.1145\/3240302"],"URL":"https:\/\/doi.org\/10.1145\/3240302.3240321","relation":{},"subject":[],"published":{"date-parts":[[2018,10]]},"assertion":[{"value":"2018-10-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}