{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,24]],"date-time":"2026-06-24T09:37:05Z","timestamp":1782293825902,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T00:00:00Z","timestamp":1538352000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1145\/3240302.3240426","type":"proceedings-article","created":{"date-parts":[[2019,1,4]],"date-time":"2019-01-04T13:33:56Z","timestamp":1546608836000},"page":"98-104","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Memory-systems challenges in realizing monolithic computers"],"prefix":"10.1145","author":[{"given":"Meenatchi","family":"Jagasivamani","sequence":"first","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Candace","family":"Walden","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Devesh","family":"Singh","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Luyi","family":"Kang","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Shang","family":"Li","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mehdi","family":"Asnaashari","sequence":"additional","affiliation":[{"name":"Crossbar, Inc."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sylvain","family":"Dubois","sequence":"additional","affiliation":[{"name":"Crossbar, Inc."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bruce","family":"Jacob","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Donald","family":"Yeung","sequence":"additional","affiliation":[{"name":"University of Maryland"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2018,10]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.15"},{"key":"e_1_3_2_1_2_1","unstructured":"Intel \"Intel Xeon Phi Product Family http:\/\/www.intel.com\/content\/www\/us\/en\/processors\/xeon\/xeon-phi-detail.html \" no. http:\/\/www.intel.com\/content\/www\/us\/en\/processors\/xeon\/xeon-phi-detail.html 2014.  Intel \"Intel Xeon Phi Product Family http:\/\/www.intel.com\/content\/www\/us\/en\/processors\/xeon\/xeon-phi-detail.html \" no. http:\/\/www.intel.com\/content\/www\/us\/en\/processors\/xeon\/xeon-phi-detail.html 2014."},{"key":"e_1_3_2_1_3_1","volume-title":"CA","author":"Agarwal A.","year":"2007","unstructured":"A. Agarwal , L. Bao , J. Brown , B. Edwards , M. Mattina , C.-C. Miao , C. Ramey , and D. Wentzlaff , \" Tile Processor: Embedded Multicore for Networking and Multimedia,\" in Proceedings of the 19th Symposium on High Performance Chips, (Starford , CA , USA) , 2007 . A. Agarwal, L. Bao, J. Brown, B. Edwards, M. Mattina, C.-C. Miao, C. Ramey, and D. Wentzlaff, \"Tile Processor: Embedded Multicore for Networking and Multimedia,\" in Proceedings of the 19th Symposium on High Performance Chips, (Starford, CA, USA), 2007."},{"key":"e_1_3_2_1_4_1","volume-title":"University of California","author":"Waterman A.","year":"2011","unstructured":"A. Waterman , Y. Lee , D. Patterson , and K. Asanovic , \" The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA,\" UCB\/EECS 2011-62 , University of California , Berkeley , May 2011 . A. Waterman, Y. Lee, D. Patterson, and K. Asanovic, \"The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA,\" UCB\/EECS 2011-62, University of California, Berkeley, May 2011."},{"key":"e_1_3_2_1_5_1","volume-title":"http:\/\/www.rambus.com","year":"2014","unstructured":"\"Rambus , http:\/\/www.rambus.com .\" 2014 . \"Rambus, http:\/\/www.rambus.com.\" 2014."},{"key":"e_1_3_2_1_6_1","volume-title":"HI)","author":"Jeddeloh J.","year":"2012","unstructured":"J. Jeddeloh and B. Keeth , \" Hybrid Memory Cube New DRAM Architecture Increases Density and Performance\" in Proceedings of the 2012 Symposium on VLSI Technology, (Honolulu , HI) , June 2012 . J. Jeddeloh and B. Keeth, \"Hybrid Memory Cube New DRAM Architecture Increases Density and Performance\" in Proceedings of the 2012 Symposium on VLSI Technology, (Honolulu, HI), June 2012."},{"key":"e_1_3_2_1_7_1","volume-title":"http:\/\/software.intel.com\/en-us\/blogs\/2013\/avx-512-instructions","author":"Instruction Extensions AVX","year":"2017","unstructured":"Intel, \" AVX 512 Instruction Extensions , http:\/\/software.intel.com\/en-us\/blogs\/2013\/avx-512-instructions .\" 2017 . Intel, \"AVX 512 Instruction Extensions, http:\/\/software.intel.com\/en-us\/blogs\/2013\/avx-512-instructions.\" 2017."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/143365.143484"}],"event":{"name":"MEMSYS '18: The International Symposium on Memory Systems","location":"Alexandria Virginia USA","acronym":"MEMSYS '18"},"container-title":["Proceedings of the International Symposium on Memory Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240302.3240426","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3240302.3240426","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:43:42Z","timestamp":1750207422000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240302.3240426"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":8,"alternative-id":["10.1145\/3240302.3240426","10.1145\/3240302"],"URL":"https:\/\/doi.org\/10.1145\/3240302.3240426","relation":{},"subject":[],"published":{"date-parts":[[2018,10]]},"assertion":[{"value":"2018-10-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}