{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,27]],"date-time":"2026-09-27T20:27:32Z","timestamp":1790540852208,"version":"4.1.0"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,11,5]],"date-time":"2018-11-05T00:00:00Z","timestamp":1541376000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"C-BRIC"},{"name":"Intel Lab"},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1230401,1237856,1701241,1361926,1535669,1652866,1715443,"],"award-info":[{"award-number":["1230401,1237856,1701241,1361926,1535669,1652866,1715443,"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"name":"SRC program sponsored by DARPA"},{"name":"one of six centers in JUMP"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,11,5]]},"DOI":"10.1145\/3240765.3240775","type":"proceedings-article","created":{"date-parts":[[2018,11,6]],"date-time":"2018-11-06T13:36:57Z","timestamp":1541511417000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":23,"title":["Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs"],"prefix":"10.1145","author":[{"given":"Yufei","family":"Ma","sequence":"first","affiliation":[{"name":"Arizona State University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tu","family":"Zheng","sequence":"additional","affiliation":[{"name":"Zhejiang University, Hangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yu","family":"Cao","sequence":"additional","affiliation":[{"name":"Arizona State University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sarma","family":"Vrudhula","sequence":"additional","affiliation":[{"name":"Arizona State University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jae-sun","family":"Seo","sequence":"additional","affiliation":[{"name":"Arizona State University"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2018,11,5]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021738"},{"key":"e_1_3_2_1_2_1","unstructured":"M. Everingham L. Van Gool C. K. I. Williams J. Winn and A. Zisserman. {n. d.}. The PASCAL Visual Object Classes Challenge 2012 (VOC2012) Results."},{"key":"e_1_3_2_1_3_1","volume-title":"FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates","author":"Guan Yijin","unstructured":"Yijin Guan, Hao Liang, Ningyi Xu, Wenqiang Wang, Shaoshuai Shi, Xi Chen, Guangyu Sun, Wei Zhang, and Jason Cong. 2017. FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates. In IEEE Int. Sym. on Field-Programmable Custom Computing Machines (FCCM). 152--159."},{"key":"e_1_3_2_1_4_1","volume-title":"Deep Residual Learning for Image Recognition. In IEEE Conference on Computer Vision and Pattern Recognition (CVPR).","author":"He Kaiming","year":"2016","unstructured":"Kaiming He, Xiangyu Zhang, Shaoqing Ren, and Jian Sun. Jun. 2016. Deep Residual Learning for Image Recognition. In IEEE Conference on Computer Vision and Pattern Recognition (CVPR)."},{"key":"e_1_3_2_1_5_1","volume-title":"Caffe: Convolutional Architecture for Fast Feature Embedding. arXiv preprint arXiv:1408.5093","author":"Jia Yangqing","year":"2014","unstructured":"Yangqing Jia, Evan Shelhamer, Jeff Donahue, Sergey Karayev, Jonathan Long, Ross Girshick, Sergio Guadarrama, and Trevor Darrell. 2014. Caffe: Convolutional Architecture for Fast Feature Embedding. arXiv preprint arXiv:1408.5093 (2014)."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/2999134.2999257"},{"key":"e_1_3_2_1_7_1","volume-title":"SSD: Single Shot MultiBox Detector. In European Conference Computer Vision (ECCV).","author":"Liu Wei","unstructured":"Wei Liu, Dragomir Anguelov, Dumitru Erhan, Christian Szegedy, Scott E. Reed, Cheng-Yang Fu, and Alexander C. Berg. Oct. 2016. SSD: Single Shot MultiBox Detector. In European Conference Computer Vision (ECCV)."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056824"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","unstructured":"Yufei Ma Yu Cao Sarma B. K. Vrudhula and Jae-sun Seo. 2017. Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks. In ACM\/SIGDA Int. Sym. on Field-Programmable Gate Arrays (FPGA). 10.1145\/3020078.3021736","DOI":"10.1145\/3020078.3021736"},{"key":"e_1_3_2_1_10_1","volume-title":"An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS. J. Solid-State Circuits","author":"Moons Bert","year":"2017","unstructured":"Bert Moons and Marian Verhelst. 2017. An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS. J. Solid-State Circuits (2017)."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","unstructured":"Jiantao Qiu Jie Wang Song Yao Kaiyuan Guo Boxun Li Erjin Zhou Jincheng Yu Tianqi Tang Ningyi Xu Sen Song Yu Wang and Huazhong Yang. 2016. Going Deeper with Embedded FPGA Platform for Convolutional Neural Network. In ACM\/SIGDA Int. Sym. on Field-Programmable Gate Arrays (FPGA). 10.1145\/2847263.2847265","DOI":"10.1145\/2847263.2847265"},{"key":"e_1_3_2_1_12_1","volume-title":"Real-Time Object Detection. In IEEE Conf. on Computer Vision and Pattern Recognition (CVPR).","author":"Redmon Joseph","year":"2016","unstructured":"Joseph Redmon, Santosh Kumar Divvala, Ross B. Girshick, and Ali Farhadi. 2016. You Only Look Once: Unified, Real-Time Object Detection. In IEEE Conf. on Computer Vision and Pattern Recognition (CVPR)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","unstructured":"Shaoqing Ren Kaiming He Ross B. Girshick and Jian Sun. Dec. 2015. Faster R-CNN: Towards Real-Time Object Detection with Region Proposal Networks. In Advances in Neural Information Processing Systems (NIPS).","DOI":"10.5555\/2969239.2969250"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870350"},{"key":"e_1_3_2_1_15_1","volume-title":"Very Deep Convolutional Networks for Large-Scale Image Recognition. CoRR abs\/1409.1556","author":"Simonyan Karen","year":"2014","unstructured":"Karen Simonyan and Andrew Zisserman. 2014. Very Deep Convolutional Networks for Large-Scale Image Recognition. CoRR abs\/1409.1556 (2014). arXiv:1409.1556 http:\/\/arxiv.org\/abs\/1409.1556"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","unstructured":"Naveen Suda Vikas Chandra Ganesh Dasika Abinash Mohanty Yufei Ma Sarma Vrudhula Jae-sun Seo and Yu Cao. 2016. Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks. In ACM\/SIGDA Int. Sym. on Field-Programmable Gate Arrays (FPGA). 10.1145\/2847263.2847276","DOI":"10.1145\/2847263.2847276"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062207"},{"key":"e_1_3_2_1_18_1","volume-title":"Multi-Scale Context Aggregation by Dilated Convolutions. CoRR abs\/1511.07122","author":"Yu Fisher","year":"2015","unstructured":"Fisher Yu and Vladlen Koltun. 2015. Multi-Scale Context Aggregation by Dilated Convolutions. CoRR abs\/1511.07122 (2015). arXiv:1511.07122 http:\/\/arxiv.org\/abs\/1511.07122"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967011"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","unstructured":"Chen Zhang Peng Li Guangyu Sun Yijin Guan Bingjun Xiao and Jason Cong. 2015. Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks. In ACM\/SIGDA Int. Sym. on Field-Programmable Gate Arrays (FPGA). 10.1145\/2684746.2689060","DOI":"10.1145\/2684746.2689060"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"crossref","unstructured":"Ruizhe Zhao Xinyu Niu Yajie Wu Wayne Luk and Qiang Liu. 2017. Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms. In Applied Reconfigurable Computing (ARC).","DOI":"10.1007\/978-3-319-56258-2_22"}],"event":{"name":"ICCAD '18: IEEE\/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN","location":"San Diego California","acronym":"ICCAD '18","sponsor":["IEEE-EDS Electronic Devices Society","IEEE CAS","IEEE CEDA"]},"container-title":["Proceedings of the International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240765.3240775","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3240765.3240775","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3240765.3240775","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:57:32Z","timestamp":1750208252000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3240765.3240775"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11,5]]},"references-count":21,"alternative-id":["10.1145\/3240765.3240775","10.1145\/3240765"],"URL":"https:\/\/doi.org\/10.1145\/3240765.3240775","relation":{},"subject":[],"published":{"date-parts":[[2018,11,5]]},"assertion":[{"value":"2018-11-05","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}