{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,24]],"date-time":"2026-02-24T16:49:58Z","timestamp":1771951798578,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","license":[{"start":{"date-parts":[[2018,11,1]],"date-time":"2018-11-01T00:00:00Z","timestamp":1541030400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1145\/3243176.3243196","type":"proceedings-article","created":{"date-parts":[[2018,10,10]],"date-time":"2018-10-10T13:32:32Z","timestamp":1539178352000},"page":"1-14","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Cost-driven thread coarsening for GPU kernels"],"prefix":"10.1145","author":[{"given":"Prithayan","family":"Barua","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun","family":"Shirako","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vivek","family":"Sarkar","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2018,11]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2018. OpenACC. https:\/\/www.openacc.org\/  2018. OpenACC. https:\/\/www.openacc.org\/"},{"key":"e_1_3_2_1_2_1","unstructured":"2018. OpenMP. https:\/\/www.openmp.org\/  2018. OpenMP. https:\/\/www.openmp.org\/"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-012-0211-z"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/125826.125925"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"e_1_3_2_1_6_1","volume-title":"End-to-End Deep Learning of Optimization Heuristics. In 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT). 219--232","author":"Cummins C.","unstructured":"C. Cummins , P. Petoumenos , Z. Wang , and H. Leather . 2017 . End-to-End Deep Learning of Optimization Heuristics. In 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT). 219--232 . C. Cummins, P. Petoumenos, Z. Wang, and H. Leather. 2017. End-to-End Deep Learning of Optimization Heuristics. In 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT). 219--232."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/24039.24041"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555775"},{"key":"e_1_3_2_1_9_1","volume-title":"2016 IEEE 34th International Conference on Computer Design (ICCD). 249--256","author":"Jia Q.","unstructured":"Q. Jia and H. Zhou . 2016. Tuning Stencil codes in OpenCL for FPGAs . In 2016 IEEE 34th International Conference on Computer Design (ICCD). 249--256 . Q. Jia and H. Zhou. 2016. Tuning Stencil codes in OpenCL for FPGAs. In 2016 IEEE 34th International Conference on Computer Design (ICCD). 249--256."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2688500.2688531"},{"key":"e_1_3_2_1_11_1","volume-title":"OpenARC: Extensible OpenACC Compiler Framework for Directive-Based Accelerator Programming Study. In 2014 First Workshop on Accelerator Programming using Directives. 1--11","author":"Lee S.","unstructured":"S. Lee and J. S. Vetter . 2014 . OpenARC: Extensible OpenACC Compiler Framework for Directive-Based Accelerator Programming Study. In 2014 First Workshop on Accelerator Programming using Directives. 1--11 . S. Lee and J. S. Vetter. 2014. OpenARC: Extensible OpenACC Compiler Framework for Directive-Based Accelerator Programming Study. In 2014 First Workshop on Accelerator Programming using Directives. 1--11."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2600212.2600704"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1287\/opre.1110.0940"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628087"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503268"},{"key":"e_1_3_2_1_16_1","unstructured":"NVIDIA. 2018. Cuda Programming Guide. (2018). http:\/\/docs.nvidia.com\/cuda\/cuda-c-programming-guide\/index.html  NVIDIA. 2018. Cuda Programming Guide. (2018). http:\/\/docs.nvidia.com\/cuda\/cuda-c-programming-guide\/index.html"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/335231.335246"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2145816.2145819"},{"key":"e_1_3_2_1_19_1","first-page":"3","article-title":"OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems","volume":"12","author":"Stone John E.","year":"2010","unstructured":"John E. Stone , David Gohara , and Guochun Shi . 2010 . OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems . IEEE Des. Test 12 , 3 (May 2010), 66--73. John E. Stone, David Gohara, and Guochun Shi. 2010. OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems. IEEE Des. Test 12, 3 (May 2010), 66--73.","journal-title":"IEEE Des. Test"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-28652-0_2"},{"key":"e_1_3_2_1_22_1","volume-title":"Proceedings of the 2008 ACM\/IEEE conference on Supercomputing. IEEE Press, 111","author":"Volkov V.","unstructured":"V. Volkov and J.W. Demmel . 2008. Benchmarking GPUs to tune dense linear algebra . In Proceedings of the 2008 ACM\/IEEE conference on Supercomputing. IEEE Press, 111 . V. Volkov and J.W. Demmel. 2008. Benchmarking GPUs to tune dense linear algebra. In Proceedings of the 2008 ACM\/IEEE conference on Supercomputing. IEEE Press, 111."}],"event":{"name":"PACT '18: International conference on Parallel Architectures and Compilation Techniques","location":"Limassol Cyprus","acronym":"PACT '18","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","IFIP WG 10.3 IFIP WG 10.3","IEEE CS"]},"container-title":["Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3243176.3243196","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3243176.3243196","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:57:39Z","timestamp":1750208259000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3243176.3243196"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":21,"alternative-id":["10.1145\/3243176.3243196","10.1145\/3243176"],"URL":"https:\/\/doi.org\/10.1145\/3243176.3243196","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]},"assertion":[{"value":"2018-11-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}