{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:22:26Z","timestamp":1758892946860,"version":"3.41.0"},"reference-count":60,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2018,8,28]],"date-time":"2018-08-28T00:00:00Z","timestamp":1535414400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGOPS Oper. Syst. Rev."],"published-print":{"date-parts":[[2018,8,28]]},"abstract":"<jats:p>Planet-scale applications are driving the exponential growth of the cloud, and datacenter specialization is the key enabler of this trend, providing order of magnitudes improvements in cost-effectiveness and energy-efficiency. While exascale computing remains a goal for supercomputing, specialized datacenters have emerged and have demonstrated beyond-exascale performance and efficiency in specific domains. This paper generalizes the applications, design methodology, and deployment challenges of the most extreme form of specialized datacenter: ASIC Clouds. It analyzes two game-changing, real-world ASIC Clouds-Bitcoin Cryptocurrency Clouds and Tensor Processing Clouds-discuss their incentives, the empowering technologies and how they benefit from the specialized ASICs. Their business models, architectures and deployment methods are useful for envisioning future potential ASIC Clouds and forecasting how they will transform computing, the economy and society.<\/jats:p>","DOI":"10.1145\/3273982.3273991","type":"journal-article","created":{"date-parts":[[2018,8,30]],"date-time":"2018-08-30T13:45:11Z","timestamp":1535636711000},"page":"96-108","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Extreme Datacenter Specialization for Planet-Scale Computing"],"prefix":"10.1145","volume":"52","author":[{"given":"Shaolin","family":"Xie","sequence":"first","affiliation":[{"name":"University of Washington"}]},{"given":"Scott","family":"Davidson","sequence":"additional","affiliation":[{"name":"University of Washington"}]},{"given":"Ikuo","family":"Magaki","sequence":"additional","affiliation":[{"name":"Apple Inc."}]},{"given":"Moein","family":"Khazraee","sequence":"additional","affiliation":[{"name":"UC San Diego"}]},{"given":"Luis","family":"Vega","sequence":"additional","affiliation":[{"name":"University of Washington"}]},{"given":"Lu","family":"Zhang","sequence":"additional","affiliation":[{"name":"UC San Diego"}]},{"given":"Michael B.","family":"Taylor","sequence":"additional","affiliation":[{"name":"University of Washington"}]}],"member":"320","published-online":{"date-parts":[[2018,8,28]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"May 8 2016. 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Falcon Accelerated Genomics Pipelines. https:\/\/aws.amazon. com\/marketplace\/pp\/B07C3NV88G."},{"key":"e_1_2_1_8_1","unstructured":"Retrieved Jun 2018. Litecoin Miner pool. https:\/\/www.ltcminer.com.  Retrieved Jun 2018. Litecoin Miner pool. https:\/\/www.ltcminer.com."},{"key":"e_1_2_1_9_1","unstructured":"Retrieved Jun 2018. Microsoft Genomics Acceleration. https:\/\/www.microsoft. com\/en-us\/research\/project\/genomicsacceleration\/.  Retrieved Jun 2018. Microsoft Genomics Acceleration. https:\/\/www.microsoft. com\/en-us\/research\/project\/genomicsacceleration\/."},{"key":"e_1_2_1_10_1","unstructured":"Retrieved Jun 2018. OpenCL miner for BitCoin. https:\/\/github.com\/Diablo-D3\/ DiabloMiner\/blob\/master\/src\/main\/resources\/DiabloMiner.cl.  Retrieved Jun 2018. OpenCL miner for BitCoin. https:\/\/github.com\/Diablo-D3\/ DiabloMiner\/blob\/master\/src\/main\/resources\/DiabloMiner.cl."},{"key":"e_1_2_1_11_1","unstructured":"Retrieved Jun 2018. Tensorflow CNN Benchmarks. https:\/\/github.com\/ tensorflow\/benchmarks\/tree\/a03070c016ab33f491ea7962765e378000490d99\/ scripts\/tf_cnn_benchmarks.  Retrieved Jun 2018. Tensorflow CNN Benchmarks. https:\/\/github.com\/ tensorflow\/benchmarks\/tree\/a03070c016ab33f491ea7962765e378000490d99\/ scripts\/tf_cnn_benchmarks."},{"key":"e_1_2_1_12_1","unstructured":"Junwhan Ahn et al. 2015. A scalable processing-in-memory accelerator for parallel graph processing.  Junwhan Ahn et al. 2015. A scalable processing-in-memory accelerator for parallel graph processing."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.11"},{"volume-title":"https:\/\/wiki.xenproject.org\/wiki\/XenParavirtOps","year":"2016","key":"e_1_2_1_14_1","unstructured":"XenParavirtOps. https:\/\/wiki.xenproject.org\/wiki\/XenParavirtOps , 2016 . XenParavirtOps. https:\/\/wiki.xenproject.org\/wiki\/XenParavirtOps, 2016."},{"key":"e_1_2_1_15_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-031-01741-4","volume-title":"The datacenter as a computer: An introduction to the design of warehouse-scale machines. Synthesis lectures on computer architecture","author":"Barroso Luiz Andr\u00e9","year":"2013","unstructured":"Luiz Andr\u00e9 Barroso , Jimmy Clidaras , and Urs H\u00f6lzle . 2013. The datacenter as a computer: An introduction to the design of warehouse-scale machines. Synthesis lectures on computer architecture ( 2013 ). Luiz Andr\u00e9 Barroso, Jimmy Clidaras, and Urs H\u00f6lzle. 2013. The datacenter as a computer: An introduction to the design of warehouse-scale machines. Synthesis lectures on computer architecture (2013)."},{"volume-title":"The GF11 Supercomputer. In International Symposium on Computer Architecture (ISCA).","author":"John","key":"e_1_2_1_16_1","unstructured":"John Beetem et al. 1985 . The GF11 Supercomputer. In International Symposium on Computer Architecture (ISCA). John Beetem et al. 1985. The GF11 Supercomputer. In International Symposium on Computer Architecture (ISCA)."},{"volume-title":"International Symposium on High Performance Computer Architecture (HPCA).","author":"Nazm Mahdi","key":"e_1_2_1_17_1","unstructured":"Mahdi Nazm Bojnordi et al. 2016. Memristive boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning . In International Symposium on High Performance Computer Architecture (HPCA). Mahdi Nazm Bojnordi et al. 2016. Memristive boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning. In International Symposium on High Performance Computer Architecture (HPCA)."},{"volume-title":"Hot Chips: A Symposium on High Performance Chips (HOTCHIPS).","author":"Adam J.","key":"e_1_2_1_18_1","unstructured":"J. Adam Butts et al. 2014. The ANTON 2 chip a second-generation ASIC for molecular dynamics . In Hot Chips: A Symposium on High Performance Chips (HOTCHIPS). J. Adam Butts et al. 2014. The ANTON 2 chip a second-generation ASIC for molecular dynamics. In Hot Chips: A Symposium on High Performance Chips (HOTCHIPS)."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.58"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.40"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.13"},{"key":"e_1_2_1_22_1","unstructured":"Eric Chung et al. Mar 2018. Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro (Mar 2018).  Eric Chung et al. Mar 2018. Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro (Mar 2018)."},{"key":"e_1_2_1_23_1","volume-title":"Hot Chips: A Symposium on High Performance Chips (HOTCHIPS).","author":"Deneroff","year":"2008","unstructured":"MartinM Deneroff et al. 2008 . Anton: A specialized ASIC for molecular dynamics . In Hot Chips: A Symposium on High Performance Chips (HOTCHIPS). MartinMDeneroff et al. 2008. Anton: A specialized ASIC for molecular dynamics. In Hot Chips: A Symposium on High Performance Chips (HOTCHIPS)."},{"volume-title":"GenAx: A Genome Sequencing Accelerator. In International Symposium on Computer Architecture (ISCA).","author":"Daichi","key":"e_1_2_1_24_1","unstructured":"Daichi Fuijiki et al. 2018 . GenAx: A Genome Sequencing Accelerator. In International Symposium on Computer Architecture (ISCA). Daichi Fuijiki et al. 2018. GenAx: A Genome Sequencing Accelerator. In International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.23"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541951"},{"volume-title":"International Symposium on Microarchitecture (MICRO).","author":"Jun Tae","key":"e_1_2_1_27_1","unstructured":"Tae Jun Ham et al. 2016. Graphicionado: A high-performance and energy-efficient accelerator for graph analytics . In International Symposium on Microarchitecture (MICRO). Tae Jun Ham et al. 2016. Graphicionado: A high-performance and energy-efficient accelerator for graph analytics. In International Symposium on Microarchitecture (MICRO)."},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.30"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.77"},{"key":"e_1_2_1_30_1","unstructured":"Elmar Haubmann. Retrieved Jun 2018. Comparing Google's TPUv2 against Nvidia's V100 on ResNet-50. https:\/\/blog.riseml.com\/ comparing-google-tpuv2-against-nvidia-v100-on-resnet-50-c2bbb6a51e5e.  Elmar Haubmann. Retrieved Jun 2018. Comparing Google's TPUv2 against Nvidia's V100 on ResNet-50. https:\/\/blog.riseml.com\/ comparing-google-tpuv2-against-nvidia-v100-on-resnet-50-c2bbb6a51e5e."},{"volume-title":"International Symposium on Microarchitecture (MICRO).","author":"Yu","key":"e_1_2_1_31_1","unstructured":"Yu Ji et al. 2016. NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints . In International Symposium on Microarchitecture (MICRO). Yu Ji et al. 2016. NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints. In International Symposium on Microarchitecture (MICRO)."},{"key":"e_1_2_1_32_1","volume-title":"International Business Strategies","author":"Jones H","year":"2014","unstructured":"H Jones . 2014. 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In International Solid-State Circuits Conference (ISSCC)."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037749"},{"key":"e_1_2_1_36_1","volume-title":"Specializing a Planet's Computation: ASIC Clouds","author":"Khazraee Moein","year":"2017","unstructured":"Moein Khazraee , Luis Vega , Ikuo Magaki , and Michael Taylor . 2017. Specializing a Planet's Computation: ASIC Clouds . IEEE Micro (May 2017 ). Moein Khazraee, Luis Vega, Ikuo Magaki, and Michael Taylor. 2017. Specializing a Planet's Computation: ASIC Clouds. IEEE Micro (May 2017)."},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.41"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540748"},{"key":"e_1_2_1_39_1","unstructured":"Alex Krizhevsky et al. 2012. Imagenet classification with deep convolutional neural networks. In Advances in Neural Information Processing Systems.   Alex Krizhevsky et al. 2012. Imagenet classification with deep convolutional neural networks. In Advances in Neural Information Processing Systems."},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.64"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485926"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.42"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.25"},{"key":"e_1_2_1_44_1","doi-asserted-by":"crossref","unstructured":"Junichiro Makino et al. 2012. GRAPE-8-An accelerator for gravitational N-body simulation with 20.5 Gflops\/W performance. In High Performance Computing Networking Storage and Analysis (SC).   Junichiro Makino et al. 2012. GRAPE-8-An accelerator for gravitational N-body simulation with 20.5 Gflops\/W performance. In High Performance Computing Networking Storage and Analysis (SC).","DOI":"10.1109\/SC.2012.60"},{"key":"e_1_2_1_45_1","volume-title":"Bitcoin: A peer-to-peer electronic cash system.","author":"Nakamoto Satoshi","year":"2008","unstructured":"Satoshi Nakamoto . 2008 . Bitcoin: A peer-to-peer electronic cash system. (2008). Satoshi Nakamoto. 2008. Bitcoin: A peer-to-peer electronic cash system. (2008)."},{"volume-title":"International Conference on Cryptography and Security Systems (CCS).","author":"Courtois","key":"e_1_2_1_46_1","unstructured":"Courtois Nicolas et al. 2014. Optimizing sha256 in bitcoin mining . In International Conference on Cryptography and Security Systems (CCS). Courtois Nicolas et al. 2014. Optimizing sha256 in bitcoin mining. In International Conference on Cryptography and Security Systems (CCS)."},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.24"},{"key":"e_1_2_1_48_1","unstructured":"A. Pedram et al. 2016. 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In International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).","author":"Taylor Michael","year":"2013","unstructured":"Michael Taylor . 2013 . Bitcoin and the Age of Bespoke Silicon. In International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES). Michael Taylor. 2013. Bitcoin and the Age of Bespoke Silicon. In International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)."},{"key":"e_1_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.90"},{"key":"e_1_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228567"},{"key":"e_1_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2017.3571056"},{"key":"e_1_2_1_57_1","unstructured":"Paul Teich. Retrieved Jun 2018. TEARING APART GOOGLE'S TPU 3.0 AI COPROCESSOR. https:\/\/www.nextplatform.com\/2018\/05\/10\/ tearing-apart-googles-tpu-3-0-ai-coprocessor\/.  Paul Teich. Retrieved Jun 2018. TEARING APART GOOGLE'S TPU 3.0 AI COPROCESSOR. https:\/\/www.nextplatform.com\/2018\/05\/10\/ tearing-apart-googles-tpu-3-0-ai-coprocessor\/."},{"key":"e_1_2_1_58_1","volume-title":"Darwin: A Hardware-acceleration Framework for Genomic Sequence Alignment. bioRxiv","author":"Yatish Turakhia","year":"2017","unstructured":"Yatish Turakhia et al. 2017 . Darwin: A Hardware-acceleration Framework for Genomic Sequence Alignment. bioRxiv (2017). Yatish Turakhia et al. 2017. Darwin: A Hardware-acceleration Framework for Genomic Sequence Alignment. bioRxiv (2017)."},{"key":"e_1_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736044"},{"volume-title":"International Symposium on Microarchitecture (MICRO).","author":"Shijin","key":"e_1_2_1_60_1","unstructured":"Shijin Zhang et al. 2016. Cambricon-X: An accelerator for sparse neural networks . In International Symposium on Microarchitecture (MICRO). Shijin Zhang et al. 2016. Cambricon-X: An accelerator for sparse neural networks. In International Symposium on Microarchitecture (MICRO)."}],"container-title":["ACM SIGOPS Operating Systems Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3273982.3273991","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3273982.3273991","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:44:44Z","timestamp":1750207484000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3273982.3273991"}},"subtitle":["ASIC Clouds"],"short-title":[],"issued":{"date-parts":[[2018,8,28]]},"references-count":60,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2018,8,28]]}},"alternative-id":["10.1145\/3273982.3273991"],"URL":"https:\/\/doi.org\/10.1145\/3273982.3273991","relation":{},"ISSN":["0163-5980"],"issn-type":[{"type":"print","value":"0163-5980"}],"subject":[],"published":{"date-parts":[[2018,8,28]]},"assertion":[{"value":"2018-08-28","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}