{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,20]],"date-time":"2025-11-20T18:38:28Z","timestamp":1763663908711,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,1,21]],"date-time":"2019-01-21T00:00:00Z","timestamp":1548028800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,1,21]]},"DOI":"10.1145\/3287624.3287625","type":"proceedings-article","created":{"date-parts":[[2019,1,18]],"date-time":"2019-01-18T21:45:18Z","timestamp":1547847918000},"page":"526-531","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["SIMULTime"],"prefix":"10.1145","author":[{"given":"Alessandro","family":"Cornaglia","sequence":"first","affiliation":[{"name":"FZI Research Center for Information Technology, Karlsruhe, Germany"}]},{"given":"Alexander","family":"Viehl","sequence":"additional","affiliation":[{"name":"FZI Research Center for Information Technology, Karlsruhe, Germany"}]},{"given":"Oliver","family":"Bringmann","sequence":"additional","affiliation":[{"name":"University of T\u00fcbingen, T\u00fcbingen, Germany"}]},{"given":"Wolfgang","family":"Rosenstiel","sequence":"additional","affiliation":[{"name":"University of T\u00fcbingen, T\u00fcbingen, Germany"}]}],"member":"320","published-online":{"date-parts":[[2019,1,21]]},"reference":[{"unstructured":"October 2018. EVM K2E (Evaluation Modules & Boards). http:\/\/www.ti.com\/devnet\/docs\/catalog\/thirdpartydevtoolfolder.tsp?actionPerformed=productFolder&productId=20300  October 2018. EVM K2E (Evaluation Modules & Boards). http:\/\/www.ti.com\/devnet\/docs\/catalog\/thirdpartydevtoolfolder.tsp?actionPerformed=productFolder&productId=20300","key":"e_1_3_2_1_1_1"},{"unstructured":"October 2018. Hercules RM57Lx Development Kit. http:\/\/www.ti.com\/tool\/tmdxrm57lhdk  October 2018. Hercules RM57Lx Development Kit. http:\/\/www.ti.com\/tool\/tmdxrm57lhdk","key":"e_1_3_2_1_2_1"},{"unstructured":"October 2018. Lauterbach TRACE32. https:\/\/www.lauterbach.com  October 2018. Lauterbach TRACE32. https:\/\/www.lauterbach.com","key":"e_1_3_2_1_3_1"},{"unstructured":"October 2018. The LLVM Compiler Infrastructure. https:\/\/llvm.org  October 2018. The LLVM Compiler Infrastructure. https:\/\/llvm.org","key":"e_1_3_2_1_4_1"},{"unstructured":"October 2018. The LLVM IR Executor: lli. https:\/\/llvm.org\/docs\/CommandGuide\/lli.html  October 2018. The LLVM IR Executor: lli. https:\/\/llvm.org\/docs\/CommandGuide\/lli.html","key":"e_1_3_2_1_5_1"},{"unstructured":"October 2018. The M\u00e4lardalen WCET Benchmarks. http:\/\/www.mrtc.mdh.se\/projects\/wcet\/benchmarks.html  October 2018. The M\u00e4lardalen WCET Benchmarks. http:\/\/www.mrtc.mdh.se\/projects\/wcet\/benchmarks.html","key":"e_1_3_2_1_6_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1007\/s10766-016-0410-0"},{"key":"e_1_3_2_1_8_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE)","author":"Benz Joscha","year":"2018","unstructured":"Joscha Benz , Christoph Gerum , and Oliver Bringmann . 2018 . Advancing source-level timing simulation using loop acceleration. In Design , Automation & Test in Europe Conference & Exhibition (DATE) , 2018. IEEE, 1393--1398. Joscha Benz, Christoph Gerum, and Oliver Bringmann. 2018. Advancing source-level timing simulation using loop acceleration. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018. IEEE, 1393--1398."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_9_1","DOI":"10.1145\/2024716.2024718"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.5555\/2755753.2757206"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1109\/ReCoSoC.2012.6322869"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_12_1","DOI":"10.5555\/2555692.2555728"},{"key":"e_1_3_2_1_13_1","volume-title":"Shade: A fast instruction-set simulator for execution profiling. In Fast Simulation of Computer Architectures","author":"Cmelik Bob","year":"1995","unstructured":"Bob Cmelik and David Keppel . 1995 . Shade: A fast instruction-set simulator for execution profiling. In Fast Simulation of Computer Architectures . Springer , 5--46. Bob Cmelik and David Keppel. 1995. Shade: A fast instruction-set simulator for execution profiling. In Fast Simulation of Computer Architectures. Springer, 5--46."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_14_1","DOI":"10.1007\/978-3-319-46559-3_5"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_15_1","DOI":"10.5555\/647474.727592"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_16_1","DOI":"10.5555\/3201607.3201717"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_17_1","DOI":"10.1145\/513918.513927"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_18_1","DOI":"10.1109\/ASPDAC.2016.7428005"},{"key":"e_1_3_2_1_19_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 512--517","author":"Ottlik Sebastian","year":"2017","unstructured":"Sebastian Ottlik , Christoph Gerum , Alexander Viehl , Wolfgang Rosenstiel , and Oliver Bringmann . 2017 . Context-sensitive timing automata for fast source level simulation. In 2017 Design , Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 512--517 . Sebastian Ottlik, Christoph Gerum, Alexander Viehl, Wolfgang Rosenstiel, and Oliver Bringmann. 2017. Context-sensitive timing automata for fast source level simulation. In 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 512--517."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_20_1","DOI":"10.1145\/2656106.2656117"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_21_1","DOI":"10.1145\/2024724.2024838"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_22_1","DOI":"10.1109\/TCAD.2016.2578882"}],"event":{"sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEICE ESS Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society","IEEE CAS","IEEE CEDA","IPSJ SIG-SLDM Information Processing Society of Japan, SIG System LSI Design Methodology"],"acronym":"ASPDAC '19","name":"ASPDAC '19: 24th Asia and South Pacific Design Automation Conference","location":"Tokyo Japan"},"container-title":["Proceedings of the 24th Asia and South Pacific Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3287624.3287625","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3287624.3287625","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:08:04Z","timestamp":1750208884000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3287624.3287625"}},"subtitle":["Context-sensitive timing simulation on intermediate code representation for rapid platform explorations"],"short-title":[],"issued":{"date-parts":[[2019,1,21]]},"references-count":22,"alternative-id":["10.1145\/3287624.3287625","10.1145\/3287624"],"URL":"https:\/\/doi.org\/10.1145\/3287624.3287625","relation":{},"subject":[],"published":{"date-parts":[[2019,1,21]]},"assertion":[{"value":"2019-01-21","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}