{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,11]],"date-time":"2026-07-11T17:18:46Z","timestamp":1783790326566,"version":"3.55.0"},"publisher-location":"New York, NY, USA","reference-count":29,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,2,20]],"date-time":"2019-02-20T00:00:00Z","timestamp":1550620800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1738550"],"award-info":[{"award-number":["1738550"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006310","name":"Utah Space Grant Consortium","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006310","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,2,20]]},"DOI":"10.1145\/3289602.3293911","type":"proceedings-article","created":{"date-parts":[[2019,2,22]],"date-time":"2019-02-22T22:12:13Z","timestamp":1550873533000},"page":"272-281","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Impact of Soft Errors on Large-Scale FPGA Cloud Computing"],"prefix":"10.1145","author":[{"given":"Andrew M.","family":"Keller","sequence":"first","affiliation":[{"name":"Brigham Young University, PROVO, UT, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michael J.","family":"Wirthlin","sequence":"additional","affiliation":[{"name":"Brigham Young University, Provo, UT, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2019,2,20]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Retrieved","year":"2018","unstructured":"2006. Measurement and reporting of alpha particle and terrestrial cosmic rayinduced soft errors in semiconductor devices . Retrieved December 12, 2018 from https:\/\/www.jedec.org\/sites\/default\/files\/docs\/JESD89A.pdf 2006. Measurement and reporting of alpha particle and terrestrial cosmic rayinduced soft errors in semiconductor devices. Retrieved December 12, 2018 from https:\/\/www.jedec.org\/sites\/default\/files\/docs\/JESD89A.pdf"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/RADECS.2008.5782755"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689066"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/3306658"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/7298.946456"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/3195638.3195647"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2003.821411"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.022071131"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1093\/biomet\/26.4.404"},{"key":"e_1_3_2_1_10_1","volume-title":"Retrieved","year":"2017","unstructured":"Deloitte. 2017 . Hitting the accelerator: the next generation of machine-learning chips . Retrieved December 12, 2018 from https:\/\/www2.deloitte.com\/content\/dam\/Deloitte\/ global\/Images\/infographics\/technologymediatelecommunications\/ gx-deloitte-tmt-2018-nextgen-machine-learning-report.pdf Deloitte. 2017. Hitting the accelerator: the next generation of machine-learning chips. Retrieved December 12, 2018 from https:\/\/www2.deloitte.com\/content\/dam\/Deloitte\/ global\/Images\/infographics\/technologymediatelecommunications\/ gx-deloitte-tmt-2018-nextgen-machine-learning-report.pdf"},{"key":"e_1_3_2_1_11_1","volume-title":"Retrieved","author":"Frank B.","year":"2017","unstructured":"B. Frank . 2017 . Microsoft unveils Brainwave, a system for running super-fast AI . Retrieved December 12, 2018 from https:\/\/venturebeat.com\/2017\/08\/22\/ microsoft-unveils-brainwave-a-system-for-running-super-fast-ai\/ B. Frank. 2017. Microsoft unveils Brainwave, a system for running super-fast AI. Retrieved December 12, 2018 from https:\/\/venturebeat.com\/2017\/08\/22\/ microsoft-unveils-brainwave-a-system-for-running-super-fast-ai\/"},{"key":"e_1_3_2_1_12_1","volume-title":"Retrieved","year":"2018","unstructured":"Intel. 2018 . Intel FPGA SDK for OpenCL -- Developer Zone . Retrieved December 12, 2018 from https:\/\/www.intel.com\/content\/www\/us\/en\/ programmable\/products\/design-software\/embedded-software-developers\/ opencl\/developer-zone.html Intel. 2018. Intel FPGA SDK for OpenCL -- Developer Zone. Retrieved December 12, 2018 from https:\/\/www.intel.com\/content\/www\/us\/en\/ programmable\/products\/design-software\/embedded-software-developers\/ opencl\/developer-zone.html"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2017.2772288"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/956417.956570"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021740"},{"key":"e_1_3_2_1_16_1","volume-title":"Improving FPGA Design Robustness with Partial TMR. In 2006 IEEE International Reliability Physics Symposium Proceedings. IEEE, 226--232","author":"Pratt B.","year":"2006","unstructured":"B. Pratt 2006 . Improving FPGA Design Robustness with Partial TMR. In 2006 IEEE International Reliability Physics Symposium Proceedings. IEEE, 226--232 . B. Pratt et al. 2006. Improving FPGA Design Robustness with Partial TMR. In 2006 IEEE International Reliability Physics Symposium Proceedings. IEEE, 226--232."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2014.2302432"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2013.2259503"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2005.61"},{"key":"e_1_3_2_1_20_1","volume-title":"Statistical Fault Injection. In 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN). IEEE, 122--127","author":"Ramachandran P.","year":"2008","unstructured":"P. Ramachandran 2008 . Statistical Fault Injection. In 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN). IEEE, 122--127 . P. Ramachandran et al. 2008. Statistical Fault Injection. In 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN). IEEE, 122--127."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1038\/nrg2857"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1897816.1897844"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"crossref","unstructured":"D. Siewiorek and R. Swarz. 1998. Reliable computer systems (third ed.). A. K. Peters Natick MA.   D. Siewiorek and R. Swarz. 1998. Reliable computer systems (third ed.). A. K. Peters Natick MA.","DOI":"10.1201\/9781439863961"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2008.2001742"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2017.8344641"},{"key":"e_1_3_2_1_26_1","volume-title":"Retrieved","year":"2018","unstructured":"Terasic. 2018 . Stratix V - DE5-Net FPGA Development Kit . Retrieved December 12, 2018 from https:\/\/www.terasic.com.tw\/cgi-bin\/page\/archive.pl?Language= English&No=526 Terasic. 2018. Stratix V - DE5-Net FPGA Development Kit. Retrieved December 12, 2018 from https:\/\/www.terasic.com.tw\/cgi-bin\/page\/archive.pl?Language= English&No=526"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508128.1508139"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2404212"},{"key":"e_1_3_2_1_29_1","volume-title":"Xilinx Inc. Retrieved","author":"Xilinx Inc.","year":"2018","unstructured":"Xilinx Inc. 2018 . Device Reliability Report . Xilinx Inc. Retrieved December 12, 2018 from https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug116.pdf Xilinx Inc. 2018. Device Reliability Report. Xilinx Inc. Retrieved December 12, 2018 from https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug116.pdf"}],"event":{"name":"FPGA '19: The 2019 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays","location":"Seaside CA USA","acronym":"FPGA '19","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 2019 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3289602.3293911","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3289602.3293911","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3289602.3293911","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:02:06Z","timestamp":1750208526000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3289602.3293911"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,2,20]]},"references-count":29,"alternative-id":["10.1145\/3289602.3293911","10.1145\/3289602"],"URL":"https:\/\/doi.org\/10.1145\/3289602.3293911","relation":{},"subject":[],"published":{"date-parts":[[2019,2,20]]},"assertion":[{"value":"2019-02-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}