{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,7]],"date-time":"2026-03-07T01:16:18Z","timestamp":1772846178410,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":7,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,2,20]],"date-time":"2019-02-20T00:00:00Z","timestamp":1550620800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,2,20]]},"DOI":"10.1145\/3289602.3293928","type":"proceedings-article","created":{"date-parts":[[2019,2,22]],"date-time":"2019-02-22T22:12:13Z","timestamp":1550873533000},"page":"14-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Build Your Own Domain-specific Solutions with RapidWright"],"prefix":"10.1145","author":[{"given":"Chris","family":"Lavin","sequence":"first","affiliation":[{"name":"Xilinx, San Jose, CA, USA"}]},{"given":"Alireza","family":"Kaviani","sequence":"additional","affiliation":[{"name":"Xilinx, San Jose, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2019,2,20]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"RapidWright: Enabling Custom Crafted Implementations for FPGAs. In 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 133--140","author":"Lavin C.","unstructured":"C. Lavin and A. Kaviani . 2018 . RapidWright: Enabling Custom Crafted Implementations for FPGAs. In 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 133--140 . C. Lavin and A. Kaviani. 2018. RapidWright: Enabling Custom Crafted Implementations for FPGAs. In 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 133--140."},{"key":"e_1_3_2_1_2_1","unstructured":"Xilinx Inc. 2018. UG472 (v1.14): 7 Series FPGAs Clocking Resources User Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug472_ 7Series_Clocking.pdf.  Xilinx Inc. 2018. UG472 (v1.14): 7 Series FPGAs Clocking Resources User Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ug472_ 7Series_Clocking.pdf."},{"key":"e_1_3_2_1_3_1","unstructured":"Xilinx Inc. 2018. UG572 (v1.7): UltraScale Architecture Clocking Resources User Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ ug572-ultrascale-clocking.pdf.  Xilinx Inc. 2018. UG572 (v1.7): UltraScale Architecture Clocking Resources User Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/user_guides\/ ug572-ultrascale-clocking.pdf."},{"key":"e_1_3_2_1_4_1","unstructured":"Xilinx Inc. 2018. UG953: Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/ sw_manuals\/xilinx2018_2\/ug953-vivado-7series-libraries.pdf.  Xilinx Inc. 2018. UG953: Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/ sw_manuals\/xilinx2018_2\/ug953-vivado-7series-libraries.pdf."},{"key":"e_1_3_2_1_5_1","unstructured":"Xilinx Inc. 2018. UG973 (v2018.1): Vivado Design Suite User Guide Release Notes Installation and Licensing. Xilinx Inc. https: \/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx2018_1\/ ug973-vivado-release-notes-install-license.pdf.  Xilinx Inc. 2018. UG973 (v2018.1): Vivado Design Suite User Guide Release Notes Installation and Licensing. Xilinx Inc. https: \/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx2018_1\/ ug973-vivado-release-notes-install-license.pdf."},{"key":"e_1_3_2_1_6_1","unstructured":"Xilinx Inc. 2018. UG974: UltraScale Architecture Libraries Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx2018_2\/ ug974-vivado-ultrascale-libraries.pdf.  Xilinx Inc. 2018. UG974: UltraScale Architecture Libraries Guide. Xilinx Inc. https:\/\/www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx2018_2\/ ug974-vivado-ultrascale-libraries.pdf."},{"key":"e_1_3_2_1_7_1","unstructured":"Xilinx Inc. 2018. UG994 (v2018.2): Vivado Design Suite User Guide Designing IP Subsystems Using IP Integrator. Xilinx Inc. https:\/\/www.xilinx.com\/support\/ documentation\/sw_manuals\/xilinx2018_2\/ug994-vivado-ip-subsystems.pdf.  Xilinx Inc. 2018. UG994 (v2018.2): Vivado Design Suite User Guide Designing IP Subsystems Using IP Integrator. Xilinx Inc. https:\/\/www.xilinx.com\/support\/ documentation\/sw_manuals\/xilinx2018_2\/ug994-vivado-ip-subsystems.pdf."}],"event":{"name":"FPGA '19: The 2019 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays","location":"Seaside CA USA","acronym":"FPGA '19","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 2019 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3289602.3293928","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3289602.3293928","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T01:02:07Z","timestamp":1750208527000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3289602.3293928"}},"subtitle":["Invited Tutorial"],"short-title":[],"issued":{"date-parts":[[2019,2,20]]},"references-count":7,"alternative-id":["10.1145\/3289602.3293928","10.1145\/3289602"],"URL":"https:\/\/doi.org\/10.1145\/3289602.3293928","relation":{},"subject":[],"published":{"date-parts":[[2019,2,20]]},"assertion":[{"value":"2019-02-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}