{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:55:47Z","timestamp":1773248147212,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":48,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,6,22]],"date-time":"2019-06-22T00:00:00Z","timestamp":1561161600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Macronix Inc.,Hsin-chu, Taiwan","award":["107-S-C38"],"award-info":[{"award-number":["107-S-C38"]}]},{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology, Taiwan","doi-asserted-by":"publisher","award":["MOST-107-2221-E- 002-043-MY2, MOST-107-2218-E-001-004-MY3"],"award-info":[{"award-number":["MOST-107-2221-E- 002-043-MY2, MOST-107-2218-E-001-004-MY3"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100005762","name":"National Taiwan University","doi-asserted-by":"publisher","award":["NTU-108L891903"],"award-info":[{"award-number":["NTU-108L891903"]}],"id":[{"id":"10.13039\/501100005762","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,6,22]]},"DOI":"10.1145\/3307650.3322271","type":"proceedings-article","created":{"date-parts":[[2019,6,14]],"date-time":"2019-06-14T12:42:33Z","timestamp":1560516153000},"page":"236-249","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":146,"title":["Sparse ReRAM engine"],"prefix":"10.1145","author":[{"given":"Tzu-Hsien","family":"Yang","sequence":"first","affiliation":[{"name":"National Taiwan University"}]},{"given":"Hsiang-Yun","family":"Cheng","sequence":"additional","affiliation":[{"name":"Academia Sinica"}]},{"given":"Chia-Lin","family":"Yang","sequence":"additional","affiliation":[{"name":"National Taiwan University"}]},{"given":"I-Ching","family":"Tseng","sequence":"additional","affiliation":[{"name":"National Taiwan University"}]},{"given":"Han-Wen","family":"Hu","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd."}]},{"given":"Hung-Sheng","family":"Chang","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd."}]},{"given":"Hsiang-Pang","family":"Li","sequence":"additional","affiliation":[{"name":"Macronix International Co., Ltd."}]}],"member":"320","published-online":{"date-parts":[[2019,6,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.11"},{"key":"e_1_3_2_1_2_1","volume-title":"Proceedings of International Symposium on Microarchitecture (MICRO).","author":"Alwani M.","unstructured":"M. Alwani, H. Chen, M. Ferdman, and P. Milder. 2016. Fused-layer CNN Accelerators. In Proceedings of International Symposium on Microarchitecture (MICRO)."},{"key":"e_1_3_2_1_3_1","unstructured":"S. Chang M. Sandler and A. Zhmoginov. 2017. The Power of Sparsity in Convolutional Neural Networks. arXiv (2017)."},{"key":"e_1_3_2_1_4_1","volume-title":"Proceedings of International Conference on Acoustics, Speech and Signal Processing (ICASSP).","author":"Chen G.","unstructured":"G. Chen, C. Parada, and G. Heigold. 2014. Small-footprint Keyword Spotting using Deep Neural Networks. In Proceedings of International Conference on Acoustics, Speech and Signal Processing (ICASSP)."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2789723"},{"key":"e_1_3_2_1_6_1","volume-title":"Proceedings of International Solid-State Circuits Conference (ISSCC).","author":"Chen W.","unstructured":"W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang, T. Hsu, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, and M. Chang. 2018. A 65nm 1Mb Nonvolatile Computing-in-memory ReRAM Macro with Sub-16ns Multiply-and-accumulate for Binary DNN AI Edge Processors. In Proceedings of International Solid-State Circuits Conference (ISSCC)."},{"key":"e_1_3_2_1_7_1","volume-title":"Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC).","author":"Chen X.","unstructured":"X. Chen, J. Zhu, J. Jiang, and C. Tsui. 2019. CompRRAE: RRAM-based Convolutional Neural Network Accelerator with Reduced Computations Through a Runtime Activation Estimation. In Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC)."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.13"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/35.41400"},{"key":"e_1_3_2_1_11_1","volume-title":"Proceedings of Computer Vision and Pattern Recognition (CVPR).","author":"Deng J.","unstructured":"J. Deng, W. Dong, R. Socher, L. Li, K. Li, and F. Li. 2009. ImageNet: A Large-scale Hierarchical Image Database. In Proceedings of Computer Vision and Pattern Recognition (CVPR)."},{"key":"e_1_3_2_1_12_1","volume-title":"Proceedings of Neural Information Processing Systems (NIPS).","author":"Denil M.","year":"2013","unstructured":"M. Denil, B. Shakibi, L. Dinh, M. Ranzato, and N. de Freitas. 2013. Predicting Parameters in Deep Learning. In Proceedings of Neural Information Processing Systems (NIPS)."},{"key":"e_1_3_2_1_13_1","volume-title":"Proceedings of International Symposium on High Performance Computer Architecture (HPCA).","author":"Feinberg B.","unstructured":"B. Feinberg, S. Wang, and E. Ipek. 2018. Making Memristive Neural Network Accelerators Reliable. In Proceedings of International Symposium on High Performance Computer Architecture (HPCA)."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2440102"},{"key":"e_1_3_2_1_15_1","volume-title":"Proceedings of International Conference on Artificial Intelligence and Statistics (AIStats).","author":"Glorot X.","unstructured":"X. Glorot, A. Bordes, and Y. Bengio. 2011. Deep Sparse Rectifier Neural Networks. In Proceedings of International Conference on Artificial Intelligence and Statistics (AIStats)."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.30"},{"key":"e_1_3_2_1_17_1","volume-title":"Deep Compression: Compressing Deep Neural Network with Pruning, Trained Quantization and Huffman Coding. arXiv","author":"Han S.","year":"2015","unstructured":"S. Han, H. Mao, and W. J. Dally. 2015. Deep Compression: Compressing Deep Neural Network with Pruning, Trained Quantization and Huffman Coding. arXiv (2015)."},{"key":"e_1_3_2_1_18_1","unstructured":"S. Han J. Pool J. Tran and W. J. Dally. 2015. Learning both Weights and Connections for Efficient Neural Networks. arXiv (2015)."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"crossref","unstructured":"K. He X. Zhang S. Ren and J. Sun. 2015. Deep Residual Learning for Image Recognition. arXiv (2015).","DOI":"10.1109\/CVPR.2016.90"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3123970"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/7902.7903"},{"key":"e_1_3_2_1_22_1","volume-title":"Proceedings of International Conference on Solid State Devices and Materials (SSDM).","author":"Hsu K.C.","unstructured":"K.C. Hsu, F.M. Lee, Y.Y. Lin, E.K. Lai, J.Y. Wu, D.Y. Lee, M.H. Lee, H.L. Lung, K.Y. Hsieh, and C.Y. Lu. 2015. A Study of Array Resistance Distribution and a Novel Operation Algorithm for WOx ReRAM Memory. In Proceedings of International Conference on Solid State Devices and Materials (SSDM)."},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"e_1_3_2_1_24_1","volume-title":"Proceedings of Design, Automation Test in Europe (DATE).","author":"Ji H.","unstructured":"H. Ji, L. Song, L. Jiang, H. H. Li, and Y. Chen. 2018. ReCom: An Efficient Resistive Accelerator for Compressed Deep Neural Networks. In Proceedings of Design, Automation Test in Europe (DATE)."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.5555\/2999134.2999257"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"e_1_3_2_1_28_1","volume-title":"Enabling Sparse Winograd Convolution by Native Pruning. arXiv","author":"Li S. R.","year":"2017","unstructured":"S. R. Li, J. Park, and P. T. P. Tang. 2017. Enabling Sparse Winograd Convolution by Native Pruning. arXiv (2017)."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"crossref","unstructured":"L. Liang L. Deng Y. Zeng X. Hu Y. Ji X. Ma G. Li and Y. Xie. 2018. Crossbar-aware Neural Network Pruning. arXiv (2018).","DOI":"10.1109\/ACCESS.2018.2874823"},{"key":"e_1_3_2_1_30_1","volume-title":"Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC).","author":"Lin J.","unstructured":"J. Lin, Z. Zhu, Y. Wang, and Y. Xie. 2019. Learning the Sparsity for ReRAM: Mapping and Pruning Sparse Neural Network for ReRAM Based Accelerator. In Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC)."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240800"},{"key":"e_1_3_2_1_32_1","volume-title":"Proceedings of International Conference on Machine Learning (ICML).","author":"Maas A. L.","unstructured":"A. L. Maas, A. Y. Hannun, and A. Y. Ng. 2013. Rectifier Nonlinearities Improve Neural Network Acoustic Models. In Proceedings of International Conference on Machine Learning (ICML)."},{"key":"e_1_3_2_1_33_1","unstructured":"P. Molchanov S. Tyree T. Karras T. Aila and J. Kautz. 2016. Pruning Convolutional Neural Networks for Resource Efficient Transfer Learning. arXiv (2016)."},{"key":"e_1_3_2_1_34_1","unstructured":"N. Muralimanohar R. Balasubramonia and N. P. Jouppi. 2009. CACTI 6.0: A Tool to Model Large Caches. Technical Report. HP Lab."},{"key":"e_1_3_2_1_35_1","volume-title":"Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC).","author":"Gu P.","unstructured":"P. Gu, B. Li, T. Tang, S. Yu, Y. Cao, Y. Wang, and H. Yang. 2015. Technological Exploration of RRAM Crossbar Array for Matrix-vector Multiplication. In Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC)."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080254"},{"key":"e_1_3_2_1_37_1","unstructured":"J. Park S. R. Li W. Wen H. Li Y. Chen and P. Dubey. 2016. Holistic SparseCNN: Forging the Trident of Accuracy Speed and Size. arXiv (2016)."},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2107214"},{"key":"e_1_3_2_1_39_1","volume-title":"Proceedings of International Conference on Learning Representations (ICLR).","author":"Sermanet P.","unstructured":"P. Sermanet, D. Eigen, X. Zhang, M. Mathieu, R. Fergus, and Y. Lecun. 2014. Overfeat: Integrated Recognition, Localization and Detection using Convolutional Networks. In Proceedings of International Conference on Learning Representations (ICLR)."},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.12"},{"key":"e_1_3_2_1_41_1","volume-title":"Proceedings of International Conference on Learning Representations (ICLR).","author":"Simonyan K.","unstructured":"K. Simonyan and A. Zisserman. 2015. Very Deep Convolutional Networks for Large-Scale Image Recognition. In Proceedings of International Conference on Learning Representations (ICLR)."},{"key":"e_1_3_2_1_42_1","volume-title":"Proceedings of International Symposium on VLSI Technology, Systems and Applications(VLSI-TSA).","author":"Su F.","unstructured":"F. Su, W. Chen, L. Xia, C. Lo, T. Tang, Z. Wang, K. Hsu, M. Cheng, J. Li, Y. Xie, Y. Wang, M. Chang, H. Yang, and Y. Liu. 2017. A 462GOPs\/J RRAM-based Nonvolatile Intelligent Processor for Energy Harvesting IoE System Featuring Nonvolatile Logics and Processing-in-memory. In Proceedings of International Symposium on VLSI Technology, Systems and Applications(VLSI-TSA)."},{"key":"e_1_3_2_1_43_1","volume-title":"Proceedings of Computer Vision and Pattern Recognition (CVPR).","author":"Szegedy C.","unstructured":"C. Szegedy, W. Liu, Y. Jia, P. Sermanet, S. Reed, D. Anguelov, D. Erhan, V. Vanhoucke, and A. Rabinovich. 2015. Going Deeper with Convolutions. In Proceedings of Computer Vision and Pattern Recognition (CVPR)."},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196116"},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.5555\/3157096.3157329"},{"key":"e_1_3_2_1_46_1","volume-title":"Proceedings of International Symposium on High Performance Computer Architecture (HPCA).","author":"Xu C.","unstructured":"C. Xu, D. Niu, N. Muralimanohar, R. Balasubramonian, T. Zhang, S. Yu, and Y. Xie. 2015. Overcoming the Challenges of Crossbar Resistive Memory Architectures. In Proceedings of International Symposium on High Performance Computer Architecture (HPCA)."},{"key":"e_1_3_2_1_47_1","volume-title":"Proceedings of International Solid-State Circuits Conference (ISSCC).","author":"Xue C.","unstructured":"C. Xue, W. Chen, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, T. Chang, T. Chang, T. Huang, H. Kao, S. Wei, Y. Chiu, C. Lee, C. Lo, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, and M. Chang. 2019. A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors. In Proceedings of International Solid-State Circuits Conference (ISSCC)."},{"key":"e_1_3_2_1_48_1","volume-title":"Proceedings of International Symposium on Computer Architecture (ISCA).","author":"Yu J.","unstructured":"J. Yu, A. Lukefahr, D. Palframan, G. Dasika, R. Das, and S. Mahlke. 2017. Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism. In Proceedings of International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_3_2_1_49_1","volume-title":"Proceedings of International Symposium on Microarchitecture (MICRO).","author":"Zhang S.","unstructured":"S. Zhang, Z. Du, L. Zhang, H. Lan, S. Liu, L. Li, Q. Guo, T. Chen, and Y. Chen. 2016. Cambricon-X: An Accelerator for Sparse Neural Networks. In Proceedings of International Symposium on Microarchitecture (MICRO)."}],"event":{"name":"ISCA '19: The 46th Annual International Symposium on Computer Architecture","location":"Phoenix Arizona","acronym":"ISCA '19","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","IEEE-CS\\DATC IEEE Computer Society"]},"container-title":["Proceedings of the 46th International Symposium on Computer Architecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3307650.3322271","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3307650.3322271","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:54:06Z","timestamp":1750204446000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3307650.3322271"}},"subtitle":["joint exploration of activation and weight sparsity in compressed neural networks"],"short-title":[],"issued":{"date-parts":[[2019,6,22]]},"references-count":48,"alternative-id":["10.1145\/3307650.3322271","10.1145\/3307650"],"URL":"https:\/\/doi.org\/10.1145\/3307650.3322271","relation":{},"subject":[],"published":{"date-parts":[[2019,6,22]]},"assertion":[{"value":"2019-06-22","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}