{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:45:22Z","timestamp":1772725522089,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":12,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,6,23]],"date-time":"2019-06-23T00:00:00Z","timestamp":1561248000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100010418","name":"Institute for Information and communications Technology Promotion","doi-asserted-by":"publisher","award":["2017-0-00142"],"award-info":[{"award-number":["2017-0-00142"]}],"id":[{"id":"10.13039\/501100010418","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["2015R1C1A1A01053844"],"award-info":[{"award-number":["2015R1C1A1A01053844"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,6,23]]},"DOI":"10.1145\/3316482.3326343","type":"proceedings-article","created":{"date-parts":[[2019,6,7]],"date-time":"2019-06-07T21:02:18Z","timestamp":1559941338000},"page":"193-197","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["A compiler-based approach for GPGPU performance calibration using TLP modulation (WIP paper)"],"prefix":"10.1145","author":[{"given":"Yongseung","family":"Yu","sequence":"first","affiliation":[{"name":"Hanyang University, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seokwon","family":"Kang","sequence":"additional","affiliation":[{"name":"Hanyang University, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yongjun","family":"Park","sequence":"additional","affiliation":[{"name":"Hanyang University, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2019,6,23]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"a C language family frontend for LLVM","year":"2007","unstructured":"Clang. a C language family frontend for LLVM , 2007 . http:\/\/clang.llvm.org. Clang. a C language family frontend for LLVM, 2007. http:\/\/clang.llvm.org."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"e_1_3_2_1_3_1","first-page":"44","volume-title":"Proc. of the IEEE Symposium on Workload Characterization","author":"Che S.","year":"2009","unstructured":"S. Che : A benchmark suite for heterogeneous computing . In Proc. of the IEEE Symposium on Workload Characterization , pages 44 - 54 , 2009 . S. Che et al. Rodinia: A benchmark suite for heterogeneous computing. In Proc. of the IEEE Symposium on Workload Characterization, pages 44-54, 2009."},{"key":"e_1_3_2_1_4_1","first-page":"157","volume-title":"Proceedings of the 22Nd International Conference on Parallel Architectures and Compilation Techniques, PACT'13","author":"Kayiran O.","year":"2013","unstructured":"O. Kayiran , A. Jog , M. T. Kandemir , and C. R. Das . Neither more nor less: Optimizing thread-level parallelismfor gpgpus . In Proceedings of the 22Nd International Conference on Parallel Architectures and Compilation Techniques, PACT'13 , pages 157 - 166 , Piscataway, NJ, USA , 2013 . IEEE Press. O. Kayiran, A. Jog, M. T. Kandemir, and C. R. Das. Neither more nor less: Optimizing thread-level parallelismfor gpgpus. In Proceedings of the 22Nd International Conference on Parallel Architectures and Compilation Techniques, PACT'13, pages 157-166, Piscataway, NJ, USA, 2013. IEEE Press."},{"key":"e_1_3_2_1_5_1","volume-title":"OpenCL - the open standard for parallel programming of heterogeneous systems","author":"KHRONOS Group","year":"2010","unstructured":"KHRONOS Group . OpenCL - the open standard for parallel programming of heterogeneous systems , 2010 . http:\/\/www.khronos.org. KHRONOS Group. OpenCL - the open standard for parallel programming of heterogeneous systems, 2010. http:\/\/www.khronos.org."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/977395.977673"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835937"},{"key":"e_1_3_2_1_8_1","volume-title":"Microprocessor Forum","author":"Nickolls J.","year":"2007","unstructured":"J. Nickolls NVIDIA CUDA software and GPU parallel computing architecture . In Microprocessor Forum , May 2007 . J. Nickolls et al. NVIDIA CUDA software and GPU parallel computing architecture. In Microprocessor Forum, May 2007."},{"key":"e_1_3_2_1_9_1","volume-title":"May","author":"NVIDIA.","year":"2011","unstructured":"NVIDIA. CUDA C Programming Guide , May 2011 . NVIDIA. CUDA C Programming Guide, May 2011."},{"key":"e_1_3_2_1_10_1","volume-title":"Profiler User's guide","author":"NVIDIA.","year":"2018","unstructured":"NVIDIA. Profiler User's guide , 2018 . http:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_profiler_Users_Guide.pdf. NVIDIA. Profiler User's guide, 2018. http:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_profiler_Users_Guide.pdf."},{"key":"e_1_3_2_1_11_1","volume-title":"the polyhedral benchmark suite","year":"2011","unstructured":"Polybench. the polyhedral benchmark suite , 2011 . http:\/\/www.cse.ohio-state.edu\/ pouchet\/software\/polybench. Polybench. the polyhedral benchmark suite, 2011. http:\/\/www.cse.ohio-state.edu\/ pouchet\/software\/polybench."},{"key":"e_1_3_2_1_12_1","volume-title":"Parboil: A revised benchmark suite for scientific and commercial throughput computing","author":"Stratton J. A.","year":"2012","unstructured":"J. A. Stratton Parboil: A revised benchmark suite for scientific and commercial throughput computing . Center for Reliable and High-Performance Computing , 127, 2012 . J. A. Stratton et al. Parboil: A revised benchmark suite for scientific and commercial throughput computing. Center for Reliable and High-Performance Computing, 127, 2012."}],"event":{"name":"LCTES '19: 20th ACM SIGPLAN\/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems","location":"Phoenix AZ USA","acronym":"LCTES '19","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 20th ACM SIGPLAN\/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3316482.3326343","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3316482.3326343","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:53:16Z","timestamp":1750204396000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3316482.3326343"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6,23]]},"references-count":12,"alternative-id":["10.1145\/3316482.3326343","10.1145\/3316482"],"URL":"https:\/\/doi.org\/10.1145\/3316482.3326343","relation":{},"subject":[],"published":{"date-parts":[[2019,6,23]]},"assertion":[{"value":"2019-06-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}