{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,3]],"date-time":"2025-12-03T17:50:44Z","timestamp":1764784244977,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":42,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,6,23]],"date-time":"2019-06-23T00:00:00Z","timestamp":1561248000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,6,23]]},"DOI":"10.1145\/3316482.3326359","type":"proceedings-article","created":{"date-parts":[[2019,6,7]],"date-time":"2019-06-07T21:02:18Z","timestamp":1559941338000},"page":"45-56","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["1+1>2: variation-aware lifetime enhancement for embedded 3D NAND flash systems"],"prefix":"10.1145","author":[{"given":"Yejia","family":"Di","sequence":"first","affiliation":[{"name":"East China Normal University, China \/ Chongqing University, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liang","family":"Shi","sequence":"additional","affiliation":[{"name":"East China Normal University, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shuo-Han","family":"Chen","sequence":"additional","affiliation":[{"name":"Academia Sinica, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chun Jason","family":"Xue","sequence":"additional","affiliation":[{"name":"City University of Hong Kong, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Edwin H.-M.","family":"Sha","sequence":"additional","affiliation":[{"name":"East China Normal University, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2019,6,23]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"G. S. Kar, and J. Van Houdt.","author":"Arreghini A.","year":"2012","unstructured":"A. Arreghini , G. Van den bosch , G. S. Kar, and J. Van Houdt. 2012 . Ultimate Scaling Projection of Cylindrical 3D SONOS Devices. In IEEE IMW. 1\u20134. A. Arreghini, G. Van den bosch, G. S. Kar, and J. Van Houdt. 2012. Ultimate Scaling Projection of Cylindrical 3D SONOS Devices. In IEEE IMW. 1\u20134."},{"volume-title":"Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling","author":"Cai Yu","key":"e_1_3_2_1_2_1","unstructured":"Yu Cai , Erich F Haratsch , Onur Mutlu , and Ken Mai . 2013. Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling . In DATE. EDA Consortium , 1285\u20131290. Yu Cai, Erich F Haratsch, Onur Mutlu, and Ken Mai. 2013. Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling. In DATE. EDA Consortium, 1285\u20131290."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278480.1278533"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062209"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2858771"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"crossref","unstructured":"Y. Di L. Shi K. Wu and C. J. Xue. 2016. Exploiting process variation for retention induced refresh minimization on flash memory. In DATE.  Y. Di L. Shi K. Wu and C. J. Xue. 2016. Exploiting process variation for retention induced refresh minimization on flash memory. In DATE.","DOI":"10.3850\/9783981537079_0343"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3211332.3211338"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995912"},{"key":"e_1_3_2_1_9_1","volume-title":"Choi et al","author":"Im J. W.","year":"2015","unstructured":"J. W. Im , W. P. Jeong , D. H. Kim , S. W. Nam , D. K. Shim , and M. H. Choi et al . 2015 . 7.2 A 128Gb 3b\/cell V-NAND flash memory with 1Gb\/s I\/O rate. In IEEE ISSCC. 1\u20133. J. W. Im, W. P. Jeong, D. H. Kim, S. W. Nam, D. K. Shim, and M. H. Choi et al. 2015. 7.2 A 128Gb 3b\/cell V-NAND flash memory with 1Gb\/s I\/O rate. In IEEE ISSCC. 1\u20133."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126511"},{"key":"e_1_3_2_1_11_1","volume-title":"Wear Unleveling: Improving NAND Flash Lifetime by Balancing Page Endurance. In FAST. USENIX, 47\u201359.","author":"Jimenez Xavier","year":"2014","unstructured":"Xavier Jimenez , David Novo , and Paolo Ienne . 2014 . Wear Unleveling: Improving NAND Flash Lifetime by Balancing Page Endurance. In FAST. USENIX, 47\u201359. Xavier Jimenez, David Novo, and Paolo Ienne. 2014. Wear Unleveling: Improving NAND Flash Lifetime by Balancing Page Endurance. In FAST. USENIX, 47\u201359."},{"key":"e_1_3_2_1_12_1","volume-title":"A. Cacciato, P. Blomme, S. Van Aerde, and A. Arreghini et al.","author":"Kar G. S.","year":"2011","unstructured":"G. S. Kar , G. Van den bosch , A. Cacciato, P. Blomme, S. Van Aerde, and A. Arreghini et al. 2011 . Novel Bi-Layer Poly-Silicon Channel Vertical Flash Cell for Ultrahigh Density 3D SONOS NAND Technology. In IEEE IMW. 1\u20134. G. S. Kar, G. Van den bosch, A. Cacciato, P. Blomme, S. Van Aerde, and A. Arreghini et al. 2011. Novel Bi-Layer Poly-Silicon Channel Vertical Flash Cell for Ultrahigh Density 3D SONOS NAND Technology. In IEEE IMW. 1\u20134."},{"key":"e_1_3_2_1_13_1","volume-title":"Exploiting compression-induced internal fragmentation for power-off recovery in ssd","author":"Kim Dongwook","year":"2016","unstructured":"Dongwook Kim , Youjip Won , Jaehyuk Cha , Sungroh Yoon , Jongmoo Choi , and Sooyong Kang . 2016. Exploiting compression-induced internal fragmentation for power-off recovery in ssd . In IEEE TC ( 2016 ), 1720\u20131733. Dongwook Kim, Youjip Won, Jaehyuk Cha, Sungroh Yoon, Jongmoo Choi, and Sooyong Kang. 2016. Exploiting compression-induced internal fragmentation for power-off recovery in ssd. In IEEE TC (2016), 1720\u20131733."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","unstructured":"S. Lee J. Park K. Fleming Arvind and J. Kim. 2011. Improving performance and lifetime of solid-state drives using hardware-accelerated compression. IEEE TCE (November 2011) 1732\u20131739.  S. Lee J. Park K. Fleming Arvind and J. Kim. 2011. Improving performance and lifetime of solid-state drives using hardware-accelerated compression. IEEE TCE (November 2011) 1732\u20131739.","DOI":"10.1109\/TCE.2011.6131148"},{"key":"e_1_3_2_1_15_1","volume-title":"Nitro: A Capacity-Optimized SSD Cache for Primary Storage. In USENIX ATC. 501\u2013512.","author":"Li Cheng","year":"2014","unstructured":"Cheng Li , Philip Shilane , Fred Douglis , Hyong Shim , Stephen Smaldone , and Grant Wallace . 2014 . Nitro: A Capacity-Optimized SSD Cache for Primary Storage. In USENIX ATC. 501\u2013512. Cheng Li, Philip Shilane, Fred Douglis, Hyong Shim, Stephen Smaldone, and Grant Wallace. 2014. Nitro: A Capacity-Optimized SSD Cache for Primary Storage. In USENIX ATC. 501\u2013512."},{"key":"e_1_3_2_1_16_1","unstructured":"Jiangpeng Li Kai Zhao Xuebin Zhang Jun Ma Ming Zhao and Tong Zhang. 2015. How much can data compressibility help to improve NAND flash memory lifetime?. In USENIX FAST. 227\u2013240.   Jiangpeng Li Kai Zhao Xuebin Zhang Jun Ma Ming Zhao and Tong Zhang. 2015. How much can data compressibility help to improve NAND flash memory lifetime?. In USENIX FAST. 227\u2013240."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/3224432"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1755913.1755915"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"crossref","unstructured":"B. Mao H. Jiang S. Wu Y. Yang and Z. Xi. 2017. Elastic Data Compression with Improved Performance and Space Efficiency for Flash-Based Storage Systems. In IPDPS. 1109\u20131118.  B. Mao H. Jiang S. Wu Y. Yang and Z. Xi. 2017. Elastic Data Compression with Improved Performance and Space Efficiency for Flash-Based Storage Systems. In IPDPS. 1109\u20131118.","DOI":"10.1109\/IPDPS.2017.64"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"crossref","unstructured":"R. Micheloni. 2016. 3D Flash Memories. (2016).   R. Micheloni. 2016. 3D Flash Memories. (2016).","DOI":"10.1007\/978-94-017-7512-0"},{"volume-title":"Inside NAND Flash Memories","author":"Micheloni Rino","key":"e_1_3_2_1_21_1","unstructured":"Rino Micheloni , Luca Crippa , and Alessia Marelli . 2010. Inside NAND Flash Memories . In Springer . Rino Micheloni, Luca Crippa, and Alessia Marelli. 2010. Inside NAND Flash Memories. In Springer."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2011.5937225"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2210256"},{"key":"e_1_3_2_1_24_1","volume-title":"Noh","author":"Park Heejin","year":"2015","unstructured":"Heejin Park , Jaeho Kim , Jongmoo Choi , Donghee Lee , and Sam H . Noh . 2015 . Incremental redundancy to reduce data retention errors in flash-based SSDs. In MSST. 1\u201313. Heejin Park, Jaeho Kim, Jongmoo Choi, Donghee Lee, and Sam H. Noh. 2015. Incremental redundancy to reduce data retention errors in flash-based SSDs. In MSST. 1\u201313."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"crossref","unstructured":"K. T. Park D. S. Byeon and D. H. Kim. 2014. A world\u2019s first product of three-dimensional vertical NAND Flash memory and beyond. In NVMTS. 1\u20135.  K. T. Park D. S. Byeon and D. H. Kim. 2014. A world\u2019s first product of three-dimensional vertical NAND Flash memory and beyond. In NVMTS. 1\u20135.","DOI":"10.1109\/NVMTS.2014.7060840"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2928275.2928279"},{"key":"e_1_3_2_1_27_1","volume-title":"Retrieved","author":"SNIA","year":"2016","unstructured":"SNIA : IOTTA Reponsitory. {n. d.}. MSR Cambridge traces . Retrieved May 27, 2016 from http:\/\/iotta.snia.org\/tracetypes\/3 SNIA: IOTTA Reponsitory. {n. d.}. MSR Cambridge traces. Retrieved May 27, 2016 from http:\/\/iotta.snia.org\/tracetypes\/3"},{"key":"e_1_3_2_1_28_1","volume-title":"Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. TVLSI","author":"Shi L.","year":"2015","unstructured":"L. Shi , Y. Di , M. Zhao , C.J. Xue , K. Wu , and E.H.-. Sha. 2015. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. TVLSI ( 2015 ), 1\u20131. L. Shi, Y. Di, M. Zhao, C.J. Xue, K. Wu, and E.H.-. Sha. 2015. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. TVLSI (2015), 1\u20131."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488938"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/2491899.2465563"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2479250"},{"key":"e_1_3_2_1_32_1","volume-title":"Yukun Zhou and Yucheng Zhang","author":"Dan Feng Yu Hua Hong Jiang","year":"2016","unstructured":"Hong Jiang Dan Feng Yu Hua Yuchong Hu Qing Liu Wen Xia , Yukun Zhou and Yucheng Zhang . 2016 . FastCDC: A Fast and Efficient Content-Defined Chunking Approach for Data Deduplication. In USENIX ATC. Denver, CO , 101\u2013114. Hong Jiang Dan Feng Yu Hua Yuchong Hu Qing Liu Wen Xia, Yukun Zhou and Yucheng Zhang. 2016. FastCDC: A Fast and Efficient Content-Defined Chunking Approach for Data Deduplication. In USENIX ATC. Denver, CO, 101\u2013114."},{"key":"e_1_3_2_1_33_1","unstructured":"Yeong-Jae Woo and Jin-Soo Kim. 2013. Diversifying wear index for MLC NAND flash memory to extend the lifetime of SSDs. In EMSOFT. 1\u201310.   Yeong-Jae Woo and Jin-Soo Kim. 2013. Diversifying wear index for MLC NAND flash memory to extend the lifetime of SSDs. In EMSOFT. 1\u201310."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/2168836.2168862"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.150"},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"crossref","unstructured":"Y. Yanagihara K. Miyaji and K. Takeuchi. 2012. Control Gate Length Spacing and Stacked Layer Number Design for 3D-Stackable NAND Flash Memory. In IEEE IMW. 1\u20134.  Y. Yanagihara K. Miyaji and K. Takeuchi. 2012. Control Gate Length Spacing and Stacked Layer Number Design for 3D-Stackable NAND Flash Memory. In IEEE IMW. 1\u20134.","DOI":"10.1109\/IMW.2012.6213656"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488936"},{"key":"e_1_3_2_1_38_1","unstructured":"Vic Ye. 2017. The Solution to the Bit Error Non-uniformity of 3D NAND. In FMS.  Vic Ye. 2017. The Solution to the Bit Error Non-uniformity of 3D NAND. In FMS."},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2004.1277861"},{"key":"e_1_3_2_1_40_1","unstructured":"Xuebin Zhang Jiangpeng Li Hao Wang Kai Zhao and Tong Zhang. 2016. Reducing solid-state storage device write stress through opportunistic in-place delta compression. In USENIX FAST. 111\u2013124.   Xuebin Zhang Jiangpeng Li Hao Wang Kai Zhao and Tong Zhang. 2016. Reducing solid-state storage device write stress through opportunistic in-place delta compression. In USENIX FAST. 111\u2013124."},{"volume-title":"Leveraging progressive programmability of SLC flash","author":"Zhang Xuebin","key":"e_1_3_2_1_41_1","unstructured":"Xuebin Zhang , Jiangpeng Li , Kai Zhao , Hao Wang , and Tong Zhang . 2015. Leveraging progressive programmability of SLC flash pages to realize zero-overhead delta compression for metadata storage. In USENIX HotStorage . Xuebin Zhang, Jiangpeng Li, Kai Zhao, Hao Wang, and Tong Zhang. 2015. Leveraging progressive programmability of SLC flash pages to realize zero-overhead delta compression for metadata storage. In USENIX HotStorage."},{"key":"e_1_3_2_1_42_1","unstructured":"Aviad Zuck Sivan Toledo Dmitry Sotnikov and Danny Harnik. 2014. Compression and SSDs: Where and how?. In INFLOW.  Aviad Zuck Sivan Toledo Dmitry Sotnikov and Danny Harnik. 2014. Compression and SSDs: Where and how?. In INFLOW."}],"event":{"name":"LCTES '19: 20th ACM SIGPLAN\/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"Phoenix AZ USA","acronym":"LCTES '19"},"container-title":["Proceedings of the 20th ACM SIGPLAN\/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3316482.3326359","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3316482.3326359","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:53:16Z","timestamp":1750204396000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3316482.3326359"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6,23]]},"references-count":42,"alternative-id":["10.1145\/3316482.3326359","10.1145\/3316482"],"URL":"https:\/\/doi.org\/10.1145\/3316482.3326359","relation":{},"subject":[],"published":{"date-parts":[[2019,6,23]]},"assertion":[{"value":"2019-06-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}