{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,27]],"date-time":"2026-06-27T15:41:01Z","timestamp":1782574861997,"version":"3.54.5"},"reference-count":60,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2019,10,10]],"date-time":"2019-10-10T00:00:00Z","timestamp":1570665600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001659","name":"German Research Foundation","doi-asserted-by":"crossref","id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2019,10,31]]},"abstract":"<jats:p>Power management through dynamic voltage and frequency scaling (DVFS) is one of the most widely adopted techniques. However, it impacts application reliability (due to soft errors, circuit aging, and deadline misses). However, increased power density impacts the thermal reliability of the chip, sometimes leading to permanent failure. To balance both application- and thermal-reliability along with achieving power savings and maintaining performance, we propose application- and thermal-reliability-aware reinforcement learning\u2013based multi-core power management in this work. The proposed power management scheme employs a reinforcement learner to consider the power savings and variations in the application and thermal reliability caused by DVFS. To overcome the computational overhead, the power management decisions are determined at the application-level rather than per-core or system-level granularity. Experimental evaluation of proposed multi-core power management on a microprocessor with up to 32 cores, running PARSEC applications, was done to demonstrate the applicability and efficiency of the proposed technique. Compared to the existing state-of-the-art techniques, the proposed technique enables an average energy savings of up to \u223c20%, up to 4.926\u00b0C temperature reduction without degradation in the application- and thermal-reliability.<\/jats:p>","DOI":"10.1145\/3323055","type":"journal-article","created":{"date-parts":[[2019,10,10]],"date-time":"2019-10-10T13:13:05Z","timestamp":1570713185000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":31,"title":["Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management"],"prefix":"10.1145","volume":"15","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4417-2387","authenticated-orcid":false,"given":"Sai Manoj Pudukotai","family":"Dinakarrao","sequence":"first","affiliation":[{"name":"George Mason University, Fairfax, VA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Arun","family":"Joseph","sequence":"additional","affiliation":[{"name":"IBM Systems, Bangalore, Karnataka, India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Anand","family":"Haridass","sequence":"additional","affiliation":[{"name":"IBM Systems, Bangalore, Karnataka, India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Muhammad","family":"Shafique","sequence":"additional","affiliation":[{"name":"Vienna University of Technology (TU Wien), Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"J\u00f6rg","family":"Henkel","sequence":"additional","affiliation":[{"name":"Karlsruhe Institute of Technology, Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Houman","family":"Homayoun","sequence":"additional","affiliation":[{"name":"University of California, Davis, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2019,10,10]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2012.117"},{"key":"e_1_2_1_2_1","volume-title":"Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201911)","author":"A. Bartolini","year":"2011","unstructured":"A. Bartolini et al. 2011 . A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multi-cores . In Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201911) . A. Bartolini et al. 2011. A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multi-cores. In Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201911)."},{"key":"e_1_2_1_3_1","volume-title":"Dynamic Programming","author":"Bellman Richard Ernest","unstructured":"Richard Ernest Bellman . 2003. Dynamic Programming . Dover Publications, Inc orporated. Richard Ernest Bellman. 2003. Dynamic Programming. Dover Publications, Incorporated."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4484043"},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of the International Conference on Parallel Architectures and Compilation Techniques.","author":"Christian","unstructured":"Christian Bienia et al. 2008. The PARSEC Benchmark suite: Characterization and architectural implications . In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques. Christian Bienia et al. 2008. The PARSEC Benchmark suite: Characterization and architectural implications. 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Integr. Circ. Syst."},{"key":"e_1_2_1_10_1","volume-title":"Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation (PATMOS'07)","author":"Dabiri Foad","unstructured":"Foad Dabiri , Ani Nahapetian , Miodrag Potkonjak , and Majid Sarrafzadeh . 2007. Soft error-aware power optimization using gate sizing . In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation (PATMOS'07) , N. Az\u00e9mard and L. Svensson (Eds.). Lecture Notes in Computer Science, Vol. 4644 . Springer , Berlin, Heidelberg. Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, and Majid Sarrafzadeh. 2007. Soft error-aware power optimization using gate sizing. In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation (PATMOS'07), N. Az\u00e9mard and L. Svensson (Eds.). Lecture Notes in Computer Science, Vol. 4644. Springer, Berlin, Heidelberg."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2010.5647675"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2173488"},{"key":"e_1_2_1_13_1","volume-title":"Proceedings of the International Symposium on Computer Architecture.","author":"Hadi","unstructured":"Hadi Esmaeilzadeh et al. 2011. Dark silicon and the end of multicore scaling . In Proceedings of the International Symposium on Computer Architecture. Hadi Esmaeilzadeh et al. 2011. Dark silicon and the end of multicore scaling. In Proceedings of the International Symposium on Computer Architecture."},{"key":"e_1_2_1_14_1","volume-title":"Proceedings of the Design Automation Conference (DAC\u201915)","author":"Gnad D.","unstructured":"D. Gnad , M. Shafique , F. Kriebel , S. Rehman , and J. Henkel . 2015. Hayat: Harnessing dark silicon and variability for aging deceleration and balancing . In Proceedings of the Design Automation Conference (DAC\u201915) . D. Gnad, M. Shafique, F. Kriebel, S. Rehman, and J. Henkel. 2015. Hayat: Harnessing dark silicon and variability for aging deceleration and balancing. In Proceedings of the Design Automation Conference (DAC\u201915)."},{"key":"e_1_2_1_15_1","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1109\/TVLSI.2006.876103","article-title":"Hotspot: Acompact thermal modeling methodology for early-stage VLSI design","volume":"14","author":"Huang Wei","year":"2006","unstructured":"Wei Huang , Shougata Ghosh , Siva Velusamy , Karthik Sankaranarayanan , Kevin Skadron , and Mircea R. Stan . 2006 . Hotspot: Acompact thermal modeling methodology for early-stage VLSI design . IEEE Trans. Very Large Scale Integr. Syst. 14 , 5 (May 2006), 501--513. Wei Huang, Shougata Ghosh, Siva Velusamy, Karthik Sankaranarayanan, Kevin Skadron, and Mircea R. Stan. 2006. Hotspot: Acompact thermal modeling methodology for early-stage VLSI design. IEEE Trans. Very Large Scale Integr. Syst. 14, 5 (May 2006), 501--513.","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2059270"},{"key":"e_1_2_1_17_1","volume-title":"Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE\u201915)","author":"Kapadia N.","unstructured":"N. Kapadia and S. Pasricha . 2015. VARSHA: Variation and reliability-aware application scheduling with adaptive parallelism in the dark-silicon era . In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE\u201915) . N. Kapadia and S. Pasricha. 2015. VARSHA: Variation and reliability-aware application scheduling with adaptive parallelism in the dark-silicon era. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE\u201915)."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.136"},{"key":"e_1_2_1_19_1","volume-title":"Proceedings of the IEEE\/ACM International Symposium on Microarchitecture (MICRO\u201909)","author":"Li S.","unstructured":"S. Li , J. H. Ahn , R. D. Strong , J. B. Brockman , D. M. Tullsen , and N. P. Jouppi . 2009. McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures . In Proceedings of the IEEE\/ACM International Symposium on Microarchitecture (MICRO\u201909) . S. Li, J. H. Ahn, R. D. Strong, J. B. Brockman, D. M. Tullsen, and N. P. Jouppi. 2009. McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures. In Proceedings of the IEEE\/ACM International Symposium on Microarchitecture (MICRO\u201909)."},{"key":"e_1_2_1_20_1","volume-title":"Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201910)","author":"Liu W.","year":"2010","unstructured":"W. Liu , Y. Tan , and Q. Qiu . 2010. Enhanced Q-learning algorithm for dynamic power management with performance constraint . In Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201910) . 602--605. DOI:https:\/\/doi.org\/10.1109\/DATE. 2010 .5457135 10.1109\/DATE.2010.5457135 W. Liu, Y. Tan, and Q. Qiu. 2010. Enhanced Q-learning algorithm for dynamic power management with performance constraint. In Proceedings of the Design, Automation and Test in Europe Conference (DATE\u201910). 602--605. DOI:https:\/\/doi.org\/10.1109\/DATE.2010.5457135"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/2742060.2742078"},{"key":"e_1_2_1_22_1","volume-title":"Proceedings of the International Conference on Computer Design.","author":"Makhzan M. A.","unstructured":"M. A. Makhzan , A. Khajeh , A. Eltawil , and F. Kurdahi . 2007. Limits on voltage scaling for caches utilizing fault tolerant techniques . In Proceedings of the International Conference on Computer Design. M. A. Makhzan, A. Khajeh, A. Eltawil, and F. Kurdahi. 2007. Limits on voltage scaling for caches utilizing fault tolerant techniques. In Proceedings of the International Conference on Computer Design."},{"key":"e_1_2_1_23_1","first-page":"4","article-title":"SmartDPM: Dynamic power management using machine learning for multi-core microprocessors","volume":"14","author":"Sai Manoj P. D.","year":"2018","unstructured":"P. D. Sai Manoj , A. Jantsch , and M. Shafique . 2018 . SmartDPM: Dynamic power management using machine learning for multi-core microprocessors . J. Low-Power Electron. 14 , 4 (Dec. 2018). P. D. Sai Manoj, A. Jantsch, and M. Shafique. 2018. SmartDPM: Dynamic power management using machine learning for multi-core microprocessors. J. Low-Power Electron. 14, 4 (Dec. 2018).","journal-title":"J. Low-Power Electron."},{"key":"e_1_2_1_24_1","first-page":"6","article-title":"A scalable network-on-chip microprocessor with 2.5D integrated memory and accelerator","volume":"64","author":"Sai Manoj P. D.","year":"2017","unstructured":"P. D. Sai Manoj , J. Lin , S. Zhu , Y. Yin , X. Liu , X. Huang , C. Song , W. Zhang , M. Yan , Z. Yu , and H. Yu . 2017 . A scalable network-on-chip microprocessor with 2.5D integrated memory and accelerator . IEEE Trans. Circ. Syst. I: Reg. Papers 64 , 6 (June 2017), 1432--1443. P. D. Sai Manoj, J. Lin, S. Zhu, Y. Yin, X. Liu, X. Huang, C. Song, W. Zhang, M. Yan, Z. Yu, and H. Yu. 2017. A scalable network-on-chip microprocessor with 2.5D integrated memory and accelerator. IEEE Trans. Circ. Syst. I: Reg. Papers 64, 6 (June 2017), 1432--1443.","journal-title":"IEEE Trans. Circ. Syst. I: Reg. Papers"},{"key":"e_1_2_1_25_1","first-page":"4","article-title":"A Q-Learning based self-adaptive I\/O communication for 2.5D integrated many-core microprocessor and memory","volume":"65","author":"Sai Manoj P. D.","year":"2016","unstructured":"P. D. Sai Manoj , H. Yu , H. Huang , and D. Xu . 2016 . A Q-Learning based self-adaptive I\/O communication for 2.5D integrated many-core microprocessor and memory . IEEE Trans. Comput. 65 , 4 (Apr. 2016), 1185--1196. P. D. Sai Manoj, H. Yu, H. Huang, and D. Xu. 2016. A Q-Learning based self-adaptive I\/O communication for 2.5D integrated many-core microprocessor and memory. IEEE Trans. Comput. 65, 4 (Apr. 2016), 1185--1196.","journal-title":"IEEE Trans. Comput."},{"key":"e_1_2_1_26_1","first-page":"11","article-title":"Reliable 3-D clock-tree synthesis considering nonlinear capacitive TSV model with electrical-thermal-mechanical coupling","volume":"32","author":"Sai Manoj P. D.","year":"2013","unstructured":"P. D. Sai Manoj , H. Yu , Y. Shang , C. S. Tan , and S. K. Lim . 2013 . Reliable 3-D clock-tree synthesis considering nonlinear capacitive TSV model with electrical-thermal-mechanical coupling . IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 32 , 11 (Nov. 2013), 1734--1747. P. D. Sai Manoj, H. Yu, Y. Shang, C. S. Tan, and S. K. Lim. 2013. Reliable 3-D clock-tree synthesis considering nonlinear capacitive TSV model with electrical-thermal-mechanical coupling. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 32, 11 (Nov. 2013), 1734--1747.","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst."},{"key":"e_1_2_1_27_1","first-page":"11","article-title":"3D Many-core microprocessor power management by space-time multiplexing based demand-supply matching","volume":"64","author":"Sai Manoj P. D.","year":"2015","unstructured":"P. D. Sai Manoj , H. Yu , and K. Wang . 2015 . 3D Many-core microprocessor power management by space-time multiplexing based demand-supply matching . IEEE Trans. Comput. 64 , 11 (Nov. 2015), 3022--3036. P. D. Sai Manoj, H. Yu, and K. Wang. 2015. 3D Many-core microprocessor power management by space-time multiplexing based demand-supply matching. IEEE Trans. Comput. 64, 11 (Nov. 2015), 3022--3036.","journal-title":"IEEE Trans. Comput."},{"key":"e_1_2_1_28_1","volume-title":"Proceedings of the International Symposium on Computer Architecture.","author":"Mukherjee S. S.","unstructured":"S. S. Mukherjee , M. Kontz , and S. K. Reinhardt . 2002. Detailed design and evaluation of redundant multi-threading alternatives . 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In Proceedings of the International Conference on Hardware\/Software Codesign and System Synthesis."},{"key":"e_1_2_1_31_1","article-title":"Machine learning for power, energy, and thermal management on multi-core processors: A survey","volume":"10","author":"Pagani S.","year":"2018","unstructured":"S. Pagani , P. D. Sai Manoj , A. Jantsch , and J. Henkel . 2018 . Machine learning for power, energy, and thermal management on multi-core processors: A survey . IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. PP, 1--17. DOI : 10 .1109\/TCAD.2018.2878168 10.1109\/TCAD.2018.2878168 S. Pagani, P. D. Sai Manoj, A. Jantsch, and J. Henkel. 2018. Machine learning for power, energy, and thermal management on multi-core processors: A survey. IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. PP, 1--17. DOI:10.1109\/TCAD.2018.2878168","journal-title":"IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. PP, 1--17. DOI"},{"key":"e_1_2_1_32_1","volume-title":"Proceedings of the IEEE International Conference on Embedded and Real-Time Computing Systems and Applications.","author":"Qi X.","unstructured":"X. Qi , D. Zhu , and H. Aydin . 2010. Global reliability-aware power management for multiprocessor real-time systems . In Proceedings of the IEEE International Conference on Embedded and Real-Time Computing Systems and Applications. X. Qi, D. Zhu, and H. Aydin. 2010. Global reliability-aware power management for multiprocessor real-time systems. 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Ejlali, and J. Henkel. 2015. DRVS: Power-efficient reliability management through dynamic redundancy and voltage scaling under variations. In Proceedings of the International Symposium on Low Power Electronics and Design."},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629395.1629431"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2012.2218128"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593229"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2540631"},{"key":"e_1_2_1_42_1","volume-title":"Proceedings of the International Symposium on Quality Electronic Design (ISQED\u201912)","author":"Shen H.","unstructured":"H. Shen , J. Lu , and Q. Qiu . 2012. Learning-based DVFS for simultaneous temperature, performance and energy management . In Proceedings of the International Symposium on Quality Electronic Design (ISQED\u201912) . H. Shen, J. Lu, and Q. Qiu. 2012. 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Syst."},{"key":"e_1_2_1_44_1","volume-title":"Proceedings of the IEEE\/IFIP International Conference on Dependable Systems and Networks.","author":"Shye A.","unstructured":"A. Shye , T. Moseley , V. J. Reddi , J. Blomstedt , and D. A. Connors . 2007. Using process-level redundancy to exploit multiple cores for transient fault tolerance . In Proceedings of the IEEE\/IFIP International Conference on Dependable Systems and Networks. A. Shye, T. Moseley, V. J. Reddi, J. Blomstedt, and D. A. Connors. 2007. Using process-level redundancy to exploit multiple cores for transient fault tolerance. In Proceedings of the IEEE\/IFIP International Conference on Dependable Systems and Networks."},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2008.7476555"},{"key":"e_1_2_1_46_1","volume-title":"Proceedings of the International Conference on Dependable Systems and Networks.","author":"Srinivasan J.","unstructured":"J. Srinivasan , S. V. Adve , P. Bose , and J. A. Rivers . 2004. The impact of technology scaling on lifetime reliability . In Proceedings of the International Conference on Dependable Systems and Networks. J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers. 2004. The impact of technology scaling on lifetime reliability. In Proceedings of the International Conference on Dependable Systems and Networks."},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.54"},{"key":"e_1_2_1_48_1","volume-title":"Proceedings of the IEEE International Symposium on High Performance Computer Architecture (HPCA\u201917)","author":"Swaminathan K.","unstructured":"K. Swaminathan , N. Chandramoorthy , C. Y. Cher , R. Bertran , A. Buyuktosunoglu , and P. Bose . 2017. BRAVO: Balanced reliability-aware voltage optimization . In Proceedings of the IEEE International Symposium on High Performance Computer Architecture (HPCA\u201917) . K. Swaminathan, N. Chandramoorthy, C. Y. Cher, R. Bertran, A. Buyuktosunoglu, and P. Bose. 2017. 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A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I\/Os . In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE\u201914) . S. S. Wu, K. Wang, P. D. Sai Manoj, T. Y. Ho, M. Yu, and H. Yu. 2014. A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I\/Os. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE\u201914)."},{"key":"e_1_2_1_56_1","first-page":"4","article-title":"A 2.5-D Memory-logic integration with data-pattern-aware memory controller","volume":"32","author":"Xu D.","year":"2015","unstructured":"D. Xu , N. Yu , P. D. Sai Manoj , K. Wang , H. Yu , and M. Yu . 2015 . A 2.5-D Memory-logic integration with data-pattern-aware memory controller . IEEE Design Test 32 , 4 (Aug. 2015), 1--10. D. Xu, N. Yu, P. D. Sai Manoj, K. Wang, H. Yu, and M. Yu. 2015. A 2.5-D Memory-logic integration with data-pattern-aware memory controller. IEEE Design Test 32, 4 (Aug. 2015), 1--10.","journal-title":"IEEE Design Test"},{"key":"e_1_2_1_57_1","volume-title":"Proceedings of the IEEE\/ACM International Symposium on Cluster, Cloud, and Grid Computing.","author":"Xu X.","unstructured":"X. Xu , K. Teramoto , A. Morales , and H. H. Huang . 2013. DUAL: Reliability-aware power management in data centers . In Proceedings of the IEEE\/ACM International Symposium on Cluster, Cloud, and Grid Computing. X. Xu, K. Teramoto, A. Morales, and H. H. Huang. 2013. DUAL: Reliability-aware power management in data centers. In Proceedings of the IEEE\/ACM International Symposium on Cluster, Cloud, and Grid Computing."},{"key":"e_1_2_1_58_1","volume-title":"Proceedings of the International Workshop on Power and Timing Modeling, Optimization and Simulation.","author":"Sheng","unstructured":"Sheng Yang et al. 2015. Adaptive energy minimization of embedded heterogeneous systems using regression-based learning . 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In Proceedings of the IEEE\/ACM International Conference on Computer Aided Design."}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3323055","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3323055","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:23:15Z","timestamp":1750202595000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3323055"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,10]]},"references-count":60,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2019,10,31]]}},"alternative-id":["10.1145\/3323055"],"URL":"https:\/\/doi.org\/10.1145\/3323055","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"value":"1550-4832","type":"print"},{"value":"1550-4840","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,10,10]]},"assertion":[{"value":"2018-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-03-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-10-10","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}