{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T20:32:12Z","timestamp":1783715532037,"version":"3.55.0"},"reference-count":28,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2019,6,28]],"date-time":"2019-06-28T00:00:00Z","timestamp":1561680000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2019,7,31]]},"abstract":"<jats:p>Performance of analog circuits degrades over time due to several time-dependent degradation mechanisms. Due to the increased aging problems in ever-shrinking dimensions, reliability of complementary metal-oxide-semiconductor analog circuits has become a major concern. Overdesign is a popular aging-aware circuit design approach, where circuit operation is guardbanded by choosing the design point beyond the optimal region. For the sake of reliability, power consumption and chip area are sacrificed in this approach, which is undesirable considering strict energy limitations in modern applications. Conversely, Sense and React (S8R) approach serves the same purpose without any additional power consumption, in which degradation of circuit features is detected by online monitoring and recovered immediately. Furthermore, such systems enable remote control and healing of circuits. However, design of an S8R system is quite complicated. In particular, determination of efficient aging signatures and design of recovery strategy are highly challenging problems. This study thoroughly discusses the design process of S8R systems and proposes computer-aided-design-based design strategies that reduce the designer effort considerably. A novel design automation tool for S8R systems was developed, in which signature selection and recovery determination were integrated. To demonstrate proposed design strategies, two different S8R systems are implemented, simulated, and discussed in detail.<\/jats:p>","DOI":"10.1145\/3325069","type":"journal-article","created":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T19:19:22Z","timestamp":1562008762000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena"],"prefix":"10.1145","volume":"24","author":[{"given":"Eng\u00edn","family":"Afacan","sequence":"first","affiliation":[{"name":"Kocaeli University, Kocaeli, Turkey"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"G\u00fcnhan","family":"D\u00fcndar","sequence":"additional","affiliation":[{"name":"Bogazici University, Bebek, Istanbul, Turkey"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Fa\u00edk","family":"Ba\u015fkaya","sequence":"additional","affiliation":[{"name":"Bogazici University, Bebek, Istanbul, Turkey"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Al\u00ed Emre","family":"Pusane","sequence":"additional","affiliation":[{"name":"Bogazici University, Bebek, Istanbul, Turkey"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mustafa Berke","family":"Yelten","sequence":"additional","affiliation":[{"name":"Istanbul Technical University, Maslak, Istanbul, Turkey"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2019,6,28]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201915)","author":"Engin","unstructured":"Engin Afacan et al. 2015. A deterministic aging simulator and an analog circuit sizing tool robust to aging phenomena . In Proceedings of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201915) . IEEE, 1--4. Engin Afacan et al. 2015. A deterministic aging simulator and an analog circuit sizing tool robust to aging phenomena. In Proceedings of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201915). IEEE, 1--4."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2016.05.002"},{"key":"e_1_2_1_3_1","volume-title":"Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916)","author":"Engin","unstructured":"Engin Afacan et al. 2016b. Efficient signature selection tool for sense 8 react systems . In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916) . IEEE, 1--4. Engin Afacan et al. 2016b. Efficient signature selection tool for sense 8 react systems. In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916). IEEE, 1--4."},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916)","author":"Engin","unstructured":"Engin Afacan et al. 2016c. Semi-empirical aging model development via accelerated aging test . In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916) . IEEE, 1--4. Engin Afacan et al. 2016c. Semi-empirical aging model development via accelerated aging test. In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD\u201916). IEEE, 1--4."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2013.08.013"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2010.5724411"},{"key":"e_1_2_1_7_1","volume-title":"Proceedings of the 18th IEEE European Test Symposium (ETS\u201913)","author":"Manuel","unstructured":"Manuel J. Barragan and Gildas Leger. 2013. Efficient selection of signatures for analog\/RF alternate test . In Proceedings of the 18th IEEE European Test Symposium (ETS\u201913) . IEEE, 1--6. Manuel J. Barragan and Gildas Leger. 2013. Efficient selection of signatures for analog\/RF alternate test. In Proceedings of the 18th IEEE European Test Symposium (ETS\u201913). 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