{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T06:51:51Z","timestamp":1770274311805,"version":"3.49.0"},"reference-count":45,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2019,8,13]],"date-time":"2019-08-13T00:00:00Z","timestamp":1565654400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"King Fahd University of Petroleum and Minerals, Saudi Arabia"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2019,9,30]]},"abstract":"<jats:p>Using security primitives, a novel scheme for licensing hardware intellectual properties (HWIPs) on Field Programmable Gate Arrays (FPGAs) in public clouds is proposed. The proposed scheme enforces a pay-per-use model, allows HWIP's installation only on specific on-cloud FPGAs, and efficiently protects the HWIPs from being cloned, reverse engineered, or used without the owner's authorization by any party, including a cloud insider. It also provides protection for the users\u2019 designs integrated with the HWIP on the same FPGA. This enables cloud tenants to license HWIPs in the cloud from the HWIP vendors at a relatively low price based on usage instead of paying the expensive unlimited HWIP license fee. The scheme includes a protocol for FPGA authentication, HWIP secure decryption, and usage by the clients without the need for the HWIP vendor to be involved or divulge their secret keys. A complete prototype test-bed implementation showed that the proposed scheme is very feasible with relatively low resource utilization. Experiments also showed that a HWIP could be licensed and set up in the on-cloud FPGA in 0.9s. This is 15 times faster than setting up the same HWIP from outside the cloud, which takes about 14s based on the average global Internet speed.<\/jats:p>","DOI":"10.1145\/3329861","type":"journal-article","created":{"date-parts":[[2019,8,13]],"date-time":"2019-08-13T14:41:50Z","timestamp":1565707310000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["A Protection and Pay-per-use Licensing Scheme for On-cloud FPGA Circuit IPs"],"prefix":"10.1145","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4643-0853","authenticated-orcid":false,"given":"Muhammad E. S.","family":"Elrabaa","sequence":"first","affiliation":[{"name":"King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mohamed A.","family":"Al-Asli","sequence":"additional","affiliation":[{"name":"Taibah University, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marwan H.","family":"Abu-Amara","sequence":"additional","affiliation":[{"name":"King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2019,8,13]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"P. K. Gupta. 2017. Bringing FPGA acceleration to the cloud-IT peer network. Retrieved from https:\/\/itpeernetwork.intel.com\/fpga-acceleration-to-the-cloud\/.  P. K. Gupta. 2017. Bringing FPGA acceleration to the cloud-IT peer network. Retrieved from https:\/\/itpeernetwork.intel.com\/fpga-acceleration-to-the-cloud\/."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/2665671.2665678"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2010.84"},{"key":"e_1_2_1_4_1","unstructured":"J. Morra. 2016. Amazon plugs xilinx FPGA into its cloud. Retrieved from http:\/\/ www.electronicdesign.com\/fpgas\/amazon-plugs-xilinx-fpga-its-cloud.  J. Morra. 2016. Amazon plugs xilinx FPGA into its cloud. Retrieved from http:\/\/ www.electronicdesign.com\/fpgas\/amazon-plugs-xilinx-fpga-its-cloud."},{"key":"e_1_2_1_5_1","unstructured":"Project Catapult Microsoft Research. Retrieved from http:\/\/www.microsoft.com\/en-us\/research\/project\/project-catapult.  Project Catapult Microsoft Research. Retrieved from http:\/\/www.microsoft.com\/en-us\/research\/project\/project-catapult."},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2169667"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2016.2553443"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74735-2_5"},{"key":"e_1_2_1_9_1","doi-asserted-by":"crossref","unstructured":"M. A. Gora A. Maiti and P. Schaumont. 2010. A flexible design flow for software IP binding in FPGA. IEEE Trans. Ind. Inform. 6 4 (2010) 719--728.  M. A. Gora A. Maiti and P. Schaumont. 2010. A flexible design flow for software IP binding in FPGA. IEEE Trans. Ind. Inform. 6 4 (2010) 719--728.","DOI":"10.1109\/TII.2010.2068303"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2008.4559053"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380646"},{"key":"e_1_2_1_12_1","volume-title":"Proceedings of the IEEE Computer Society Annual Symposium on Very Large Scale Integration. 677--682","author":"Kumar S.","year":"2017","unstructured":"S. Kumar 2017 . A flexible pay-per device licensing scheme for FPGA IP cores . In Proceedings of the IEEE Computer Society Annual Symposium on Very Large Scale Integration. 677--682 . S. Kumar et al. 2017. A flexible pay-per device licensing scheme for FPGA IP cores. In Proceedings of the IEEE Computer Society Annual Symposium on Very Large Scale Integration. 677--682."},{"key":"e_1_2_1_13_1","doi-asserted-by":"crossref","unstructured":"L. Bossuet G. Gogniat and W. Burleson 2006. Dynamically configurable security for SRAM FPGA bitstreams. Int. J. Embed. Syst. 2 1\/2 (2006) 73--85.  L. Bossuet G. Gogniat and W. Burleson 2006. Dynamically configurable security for SRAM FPGA bitstreams. Int. J. Embed. Syst. 2 1\/2 (2006) 73--85.","DOI":"10.1504\/IJES.2006.010166"},{"key":"e_1_2_1_14_1","volume-title":"Proceedings of the International Conference on Field Programmable Technology (ICFPT\u201907)","author":"G\u00fcneysu T.","unstructured":"T. G\u00fcneysu , B. M\u00f6ller , and C. Paar . 2007. Dynamic intellectual property protection for reconfigurable devices . In Proceedings of the International Conference on Field Programmable Technology (ICFPT\u201907) . 169--176. T. G\u00fcneysu, B. M\u00f6ller, and C. Paar. 2007. Dynamic intellectual property protection for reconfigurable devices. In Proceedings of the International Conference on Field Programmable Technology (ICFPT\u201907). 169--176."},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2015.55"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-27954-6_1"},{"key":"e_1_2_1_17_1","volume-title":"Proceedings of the International Conference of the Information Society. 308--312","author":"Masoomi M.","unstructured":"M. Masoomi , M. Masoumi , and M. Ahmadian . 2010. A practical differential power analysis attack against an FPGA implementation of AES cryptosystem . In Proceedings of the International Conference of the Information Society. 308--312 . M. Masoomi, M. Masoumi, and M. Ahmadian. 2010. A practical differential power analysis attack against an FPGA implementation of AES cryptosystem. In Proceedings of the International Conference of the Information Society. 308--312."},{"key":"e_1_2_1_18_1","volume-title":"Proceedings of the Conference on New Technologies, Mobility, and Security (NTMS\u201908)","author":"Khelil F.","unstructured":"F. Khelil , M. Hamdi , S. Guilley , J. L. Danger , and N. Selmane . 2008. Fault analysis attack on an FPGA AES implementation . In Proceedings of the Conference on New Technologies, Mobility, and Security (NTMS\u201908) . 1--5. F. Khelil, M. Hamdi, S. Guilley, J. L. Danger, and N. Selmane. 2008. Fault analysis attack on an FPGA AES implementation. In Proceedings of the Conference on New Technologies, Mobility, and Security (NTMS\u201908). 1--5."},{"key":"e_1_2_1_19_1","volume-title":"Proceedings of the International Conference on Field Programmable Logic and Applications (FPL\u201905)","author":"Carlier V.","unstructured":"V. Carlier , H. Chabanne , E. Dottax , and H. Pelletier . 2005. Generalizing square attack using side-channels of an aes implementation on an FPGA . In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL\u201905) . 433--437. V. Carlier, H. Chabanne, E. Dottax, and H. Pelletier. 2005. Generalizing square attack using side-channels of an aes implementation on an FPGA. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL\u201905). 433--437."},{"key":"e_1_2_1_20_1","volume-title":"Proceedings of the International Conference on the Computer as a Tool (EUROCON\u201905)","author":"De Mulder E.","unstructured":"E. De Mulder , P. Buysschaert , S. B. Ors , P. Delmotte , B. Preneel , G. Vandenbosch , and I. Verbauwhede . 2005. Electromagnetic analysis attack on an FPGA implementation of an elliptic curve cryptosystem . In Proceedings of the International Conference on the Computer as a Tool (EUROCON\u201905) . E. De Mulder, P. Buysschaert, S. B. Ors, P. Delmotte, B. Preneel, G. Vandenbosch, and I. Verbauwhede. 2005. Electromagnetic analysis attack on an FPGA implementation of an elliptic curve cryptosystem. In Proceedings of the International Conference on the Computer as a Tool (EUROCON\u201905)."},{"key":"e_1_2_1_21_1","volume-title":"Proceedings of the IEEE International Conference on Electro\/Information Technology. 7--12","author":"Sun S.","unstructured":"S. Sun , Z. Yan , and J. Zambreno . 2008. Experiments in attacking FPGA-based embedded systems using differential power analysis . In Proceedings of the IEEE International Conference on Electro\/Information Technology. 7--12 . S. Sun, Z. Yan, and J. Zambreno. 2008. Experiments in attacking FPGA-based embedded systems using differential power analysis. In Proceedings of the IEEE International Conference on Electro\/Information Technology. 7--12."},{"key":"e_1_2_1_22_1","volume-title":"Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL\u201912)","author":"Eguro K.","unstructured":"K. Eguro and R. Venkatesan . 2012. FPGAs for trusted cloud computing . In Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL\u201912) . 63--70. K. Eguro and R. Venkatesan. 2012. FPGAs for trusted cloud computing. In Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL\u201912). 63--70."},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/CLOUD.2014.46"},{"key":"e_1_2_1_24_1","volume-title":"Attacks to a proxy-mediated key agreement protocol based on symmetric encryption. IACR Cryptol. 1081","year":"2016","unstructured":"David Nunez, Isaac Agudo, and Javier Lopez. 2016. Attacks to a proxy-mediated key agreement protocol based on symmetric encryption. IACR Cryptol. 1081 ( 2016 ). David Nunez, Isaac Agudo, and Javier Lopez. 2016. Attacks to a proxy-mediated key agreement protocol based on symmetric encryption. IACR Cryptol. 1081 (2016)."},{"key":"e_1_2_1_25_1","unstructured":"Xilinx Inc. 2013. XAPP1084(v1.3): Developing tamper resistant designs with xilinx virtex-6 and 7 series FPGAs. Retrieved from www.xilinx.com\/support\/documentation\/xapp1084_tamp_resist_dsgns.pdf.  Xilinx Inc. 2013. XAPP1084(v1.3): Developing tamper resistant designs with xilinx virtex-6 and 7 series FPGAs. Retrieved from www.xilinx.com\/support\/documentation\/xapp1084_tamp_resist_dsgns.pdf."},{"key":"e_1_2_1_26_1","volume-title":"Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC\u201911)","author":"Goren S.","unstructured":"S. Goren , O. Ozkurt , A. Yildiz , and H. F. Ugurdag . 2011. FPGA bitstream protection with PUFs, obfuscation, and multi-boot . Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC\u201911) . S. Goren, O. Ozkurt, A. Yildiz, and H. F. Ugurdag. 2011. FPGA bitstream protection with PUFs, obfuscation, and multi-boot. Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC\u201911)."},{"key":"e_1_2_1_27_1","unstructured":"Xilinx Inc. 2012. Xilinx Partial Reconfiguration User Guide. Retrieved from www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx14_1\/ug702.pdf.  Xilinx Inc. 2012. Xilinx Partial Reconfiguration User Guide. Retrieved from www.xilinx.com\/support\/documentation\/sw_manuals\/xilinx14_1\/ug702.pdf."},{"key":"e_1_2_1_28_1","volume-title":"Physical Unclonable Functions in Theory and Practice","volume":"9781461450","author":"B\u00f6hm C.","unstructured":"C. B\u00f6hm and M. Hofer . 2013 . Physical Unclonable Functions in Theory and Practice , vol. 9781461450 . C. B\u00f6hm and M. Hofer. 2013. Physical Unclonable Functions in Theory and Practice, vol. 9781461450."},{"key":"e_1_2_1_29_1","unstructured":"Stratix V Device Overview. 2015. Retrieved from https:\/\/www.intel.com\/content\/dam\/www\/programmable\/us\/en\/pdfs\/literature\/hb\/stratix-v\/stx5_51001.pdf.  Stratix V Device Overview. 2015. Retrieved from https:\/\/www.intel.com\/content\/dam\/www\/programmable\/us\/en\/pdfs\/literature\/hb\/stratix-v\/stx5_51001.pdf."},{"key":"e_1_2_1_30_1","doi-asserted-by":"crossref","unstructured":"Thorsten Kleinjung etal 2010. Factorization of a 768-bit RSA modulus. IACR Cryptol. 006 (2010).  Thorsten Kleinjung et al. 2010. Factorization of a 768-bit RSA modulus. IACR Cryptol. 006 (2010).","DOI":"10.1007\/978-3-642-14623-7_18"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1007\/BFb0054122"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2013.256"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/359460.359473"},{"key":"e_1_2_1_34_1","first-page":"129","article-title":"Differential power analysis resistant hardware implementation of the RSA cryptosystem","volume":"18","author":"Alptekin Bayam K.","year":"2010","unstructured":"K. Alptekin Bayam and B. \u00d6rs . 2010 . Differential power analysis resistant hardware implementation of the RSA cryptosystem . Turkish J. Electr. Eng. Comput. Sci. 18 , 1 (2010), 129 -- 140 . K. Alptekin Bayam and B. \u00d6rs. 2010. Differential power analysis resistant hardware implementation of the RSA cryptosystem. Turkish J. Electr. Eng. Comput. Sci. 18, 1 (2010), 129--140.","journal-title":"Turkish J. Electr. Eng. Comput. Sci."},{"key":"e_1_2_1_35_1","unstructured":"OpenStack.com OpenStack Operations Guide. Retrieved from www.openstack.org.  OpenStack.com OpenStack Operations Guide. Retrieved from www.openstack.org."},{"key":"e_1_2_1_36_1","volume-title":"Proceedings of the IEEE International Symposium on Field-Programmable Custom Computing Machines. 109--116","author":"Byma S.","unstructured":"S. Byma and J. Steffan . 2014. FPGAs in the cloud: Booting virtualized hardware accelerators with openstack . Proceedings of the IEEE International Symposium on Field-Programmable Custom Computing Machines. 109--116 S. Byma and J. Steffan. 2014. FPGAs in the cloud: Booting virtualized hardware accelerators with openstack. Proceedings of the IEEE International Symposium on Field-Programmable Custom Computing Machines. 109--116"},{"key":"e_1_2_1_37_1","unstructured":"M. Leonhard. Cloudping.info. Retrieved from http:\/\/www.cloudping.info.  M. Leonhard. Cloudping.info. Retrieved from http:\/\/www.cloudping.info."},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74735-2_19"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/503048.503055"},{"key":"e_1_2_1_40_1","unstructured":"M. Jackson. 2016. Global Average Internet Speeds Hit 6.3Mbps vs. 14.9Mbps in UK. Retrieved from www.ispreview.co.uk\/ index.php\/2016\/06\/q1-2016-akamai-uk-internet-speeds-reach-15-mbps-vs-6-3-mbps-globally.html.  M. Jackson. 2016. Global Average Internet Speeds Hit 6.3Mbps vs. 14.9Mbps in UK. Retrieved from www.ispreview.co.uk\/ index.php\/2016\/06\/q1-2016-akamai-uk-internet-speeds-reach-15-mbps-vs-6-3-mbps-globally.html."},{"key":"e_1_2_1_41_1","unstructured":"S. Drimer etal 2008. Protecting multiple cores in a single FPGA design. Retrieved from http:\/\/www.saardrimer.com\/sd410\/papers\/protect_many_cores.pdf.  S. Drimer et al. 2008. Protecting multiple cores in a single FPGA design. Retrieved from http:\/\/www.saardrimer.com\/sd410\/papers\/protect_many_cores.pdf."},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2014.2355043"},{"key":"e_1_2_1_43_1","volume-title":"Proceedings of the IEEE International Symposium on Circuits and Systems.","author":"Zhang L.","unstructured":"L. Zhang and C. Chang . 2015. Public key protocol for usage-based licensing of FPGA IP cores . In Proceedings of the IEEE International Symposium on Circuits and Systems. L. Zhang and C. Chang. 2015. Public key protocol for usage-based licensing of FPGA IP cores. In Proceedings of the IEEE International Symposium on Circuits and Systems."},{"key":"e_1_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2017.2738600"},{"key":"e_1_2_1_45_1","volume-title":"Proceedings of the 13th International Conference on Field Programmable Technology. 147--152","author":"Zhang J.","unstructured":"J. Zhang and G. Qu . 2014. A Survey on security and trust of FPGA-based systems . Proceedings of the 13th International Conference on Field Programmable Technology. 147--152 . J. Zhang and G. Qu. 2014. A Survey on security and trust of FPGA-based systems. Proceedings of the 13th International Conference on Field Programmable Technology. 147--152."}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3329861","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3329861","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:26:23Z","timestamp":1750206383000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3329861"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8,13]]},"references-count":45,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2019,9,30]]}},"alternative-id":["10.1145\/3329861"],"URL":"https:\/\/doi.org\/10.1145\/3329861","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"value":"1936-7406","type":"print"},{"value":"1936-7414","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,8,13]]},"assertion":[{"value":"2018-08-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-04-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-08-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}