{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,19]],"date-time":"2025-09-19T08:34:18Z","timestamp":1758270858491,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":10,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,10,13]],"date-time":"2019-10-13T00:00:00Z","timestamp":1570924800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-0953447 and CNS-1718033"],"award-info":[{"award-number":["CNS-0953447 and CNS-1718033"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,10,13]]},"DOI":"10.1145\/3349567.3351730","type":"proceedings-article","created":{"date-parts":[[2019,11,20]],"date-time":"2019-11-20T13:56:52Z","timestamp":1574258212000},"page":"1-2","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Offloading cache configuration prediction to an FPGA for hardware speedup and overhead reduction"],"prefix":"10.1145","author":[{"given":"Ruben","family":"Vazquez","sequence":"first","affiliation":[{"name":"University of Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ann","family":"Gordon-Ross","sequence":"additional","affiliation":[{"name":"University of Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Greg","family":"Stitt","sequence":"additional","affiliation":[{"name":"University of Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2019,10,13]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"M. Abadi P. Barham J. Chen Z. Chen A. Davis J. Dean M. Devin S. Ghemawat G. Irving M. Isard M. Kudlur J. Levenberg R. Monga S. Moore D. G. Murray B. Steiner P. Tucker V. Vasudevan P. Warden M. Wicke Y. Yu and X. Zheng \"TensorFlow: A system for large-scale machine learning \" in 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16) 2016  M. Abadi P. Barham J. Chen Z. Chen A. Davis J. Dean M. Devin S. Ghemawat G. Irving M. Isard M. Kudlur J. Levenberg R. Monga S. Moore D. G. Murray B. Steiner P. Tucker V. Vasudevan P. Warden M. Wicke Y. Yu and X. Zheng \"TensorFlow: A system for large-scale machine learning \" in 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16) 2016"},{"key":"e_1_3_2_1_2_1","unstructured":"arXiv:1807.05317 [cs.LG].  arXiv:1807.05317 [cs.LG]."},{"volume-title":"Proceedings of the 15th ACM International Conference on Computing Frontiers (CF '18)","author":"Dutta B.","key":"e_1_3_2_1_3_1"},{"key":"e_1_3_2_1_4_1","unstructured":"EEMBC. The Embedded Microprocessor Benchmark Consortium http:\/\/www.eembc.org\/benchmark\/automotive_sl.php Sept. 2013  EEMBC. The Embedded Microprocessor Benchmark Consortium http:\/\/www.eembc.org\/benchmark\/automotive_sl.php Sept. 2013"},{"first-page":"696","volume-title":"OH, 2014","author":"Gokhale V.","key":"e_1_3_2_1_5_1"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077681"},{"volume-title":"Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop (WWC '01)","author":"Guthaus M. R.","key":"e_1_3_2_1_7_1"},{"key":"e_1_3_2_1_8_1","first-page":"146","volume-title":"Chiangmai","author":"Khakhaeng S.","year":"2016"},{"key":"e_1_3_2_1_9_1","first-page":"1","volume-title":"Vienna","author":"Lane N. D.","year":"2016"},{"key":"e_1_3_2_1_10_1","unstructured":"\"Perf events tutorial \" http:\/\/perf.wiki.kernel.org\/ 2012.  \"Perf events tutorial \" http:\/\/perf.wiki.kernel.org\/ 2012."}],"event":{"name":"CODES\/ISSS '19: International Conference on Hardware\/Software Codesign and System Synthesis","acronym":"CODES\/ISSS '19","location":"New York New York"},"container-title":["Proceedings of the International Conference on Hardware\/Software Codesign and System Synthesis Companion"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3349567.3351730","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3349567.3351730","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3349567.3351730","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:25:45Z","timestamp":1750206345000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3349567.3351730"}},"subtitle":["work-in-progress"],"short-title":[],"issued":{"date-parts":[[2019,10,13]]},"references-count":10,"alternative-id":["10.1145\/3349567.3351730","10.1145\/3349567"],"URL":"https:\/\/doi.org\/10.1145\/3349567.3351730","relation":{},"subject":[],"published":{"date-parts":[[2019,10,13]]},"assertion":[{"value":"2019-10-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}