{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T12:20:07Z","timestamp":1763727607734,"version":"3.41.2"},"publisher-location":"New York, NY, USA","reference-count":33,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,10,12]],"date-time":"2019-10-12T00:00:00Z","timestamp":1570838400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"DARPA","award":["HR0011-18-C-0017"],"award-info":[{"award-number":["HR0011-18-C-0017"]}]},{"name":"ONR","award":["N00014-16-1-2263,N00014-17-1-2788,N00014-15-1-2173"],"award-info":[{"award-number":["N00014-16-1-2263,N00014-17-1-2788,N00014-15-1-2173"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,10,12]]},"DOI":"10.1145\/3352460.3358299","type":"proceedings-article","created":{"date-parts":[[2019,10,11]],"date-time":"2019-10-11T11:16:45Z","timestamp":1570792605000},"page":"558-571","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":26,"title":["Practical Byte-Granular Memory Blacklisting using Califorms"],"prefix":"10.1145","author":[{"given":"Hiroshi","family":"Sasaki","sequence":"first","affiliation":[{"name":"Columbia University"}]},{"given":"Miguel A.","family":"Arroyo","sequence":"additional","affiliation":[{"name":"Columbia University"}]},{"given":"M. Tarek Ibn","family":"Ziad","sequence":"additional","affiliation":[{"name":"Columbia University"}]},{"given":"Koustubha","family":"Bhat","sequence":"additional","affiliation":[{"name":"Vrije Universiteit Amsterdam"}]},{"given":"Kanad","family":"Sinha","sequence":"additional","affiliation":[{"name":"Columbia University"}]},{"given":"Simha","family":"Sethumadhavan","sequence":"additional","affiliation":[{"name":"Columbia University"}]}],"member":"320","published-online":{"date-parts":[[2019,10,12]]},"reference":[{"volume-title":"https:\/\/cve.mitre.org\/cgi-bin\/cvename.cgi?name=CVE-2014-1444. [Online","year":"2019","key":"e_1_3_2_1_1_1","unstructured":"2014. CVE--2014--1444. https:\/\/cve.mitre.org\/cgi-bin\/cvename.cgi?name=CVE-2014-1444. [Online; accessed 30-Aug-2019]."},{"volume-title":"https:\/\/cve.mitre.org\/cgi-bin\/cvename.cgi?name=CVE-2017-5115. [Online","year":"2019","key":"e_1_3_2_1_2_1","unstructured":"2017. CVE--2017--5115. https:\/\/cve.mitre.org\/cgi-bin\/cvename.cgi?name=CVE-2017-5115. [Online; accessed 30-Aug-2019]."},{"key":"e_1_3_2_1_3_1","unstructured":"ARM. 2018. ARM A64 instruction set architecture for ARMv8-A architecture profile. https:\/\/static.docs.arm.com\/ddi0596\/a\/DDI_0596_ARM_a64_instruction_set_architecture.pdf."},{"key":"e_1_3_2_1_4_1","volume-title":"David Mazi e res, and Dan Boneh","author":"Bittau Andrea","year":"2014","unstructured":"Andrea Bittau, Adam Belay, Ali Mashtizadeh, David Mazi e res, and Dan Boneh. 2014. Hacking blind. In IEEE S&P '14: Proceedings of the 35th IEEE Symposium on Security and Privacy."},{"key":"e_1_3_2_1_5_1","unstructured":"Kees Cook. 2017. Introduce struct layout randomization plugin. https:\/\/lkml.org\/lkml\/2017\/5\/26\/558."},{"key":"e_1_3_2_1_6_1","volume-title":"USENIX Security '98: Proceedings of the 7th USENIX Security Symposium.","author":"Cowan Crispin","year":"1998","unstructured":"Crispin Cowan, Calton Pu, Dave Maier, Heather Hintony, Jonathan Walpole, Peat Bakke, Steve Beattie, Aaron Grier, Perry Wagle, and Qian Zhang. 1998. StackGuard: automatic adaptive detection and prevention of buffer-overflow attacks. In USENIX Security '98: Proceedings of the 7th USENIX Security Symposium."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304042"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346295"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2694344.2694383"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3192366.3192388"},{"key":"e_1_3_2_1_11_1","volume-title":"Computer architecture performance evaluation methods","author":"Eeckhout Lieven","unstructured":"Lieven Eeckhout. 2010. Computer architecture performance evaluation methods (1st ed.).","edition":"1"},{"key":"e_1_3_2_1_12_1","unstructured":"Nur Hussein. 2017. Randomizing structure layout. https:\/\/lwn.net\/Articles\/722293\/."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3133956.3134062"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/991124.991126"},{"volume-title":"Spectre attacks: exploiting speculative execution","author":"Kocher Paul","key":"e_1_3_2_1_15_1","unstructured":"Paul Kocher, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, Michael Schwarz, and Yuval Yarom. 2019. Spectre attacks: exploiting speculative execution. In IEEE S&P '19: Proceedings of the 40th IEEE Symposium on Security and Privacy."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2976749.2978366"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2017.23183"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337181"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2581122.2544147"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/3224423"},{"key":"e_1_3_2_1_21_1","unstructured":"Oracle. 2015. Hardware-assisted checking using Silicon Secured Memory (SSM). https:\/\/docs.oracle.com\/cd\/E37069_01\/html\/E37085\/gphwb.html."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.28"},{"key":"e_1_3_2_1_23_1","volume-title":"HPCA '05: Proceedings of the IEEE 11th International Symposium on High Performance Computer Architecture.","author":"Qin Feng","year":"2005","unstructured":"Feng Qin, Shan Lu, and Yuanyuan Zhou. 2005. SafeMem: exploiting ECC-memory for detecting memory leaks and memory corruption during production runs. In HPCA '05: Proceedings of the IEEE 11th International Symposium on High Performance Computer Architecture."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485963"},{"key":"e_1_3_2_1_25_1","volume-title":"USENIX ATC '12: Proceedings of the 2012 USENIX Annual Technical Conference.","author":"Serebryany Konstantin","year":"2012","unstructured":"Konstantin Serebryany, Derek Bruening, Alexander Potapenko, and Dmitry Vyukov. 2012. AddressSanitizer: a fast address sanity checker. In USENIX ATC '12: Proceedings of the 2012 USENIX Annual Technical Conference."},{"key":"e_1_3_2_1_26_1","volume-title":"Memory tagging and how it improves C\/C++ memory safety. arXiv.org (Feb","author":"Serebryany Kostya","year":"2018","unstructured":"Kostya Serebryany, Evgenii Stepanov, Aleksey Shlyapnikov, Vlad Tsyrklevich, and Dmitry Vyukov. 2018. Memory tagging and how it improves C\/C++ memory safety. arXiv.org (Feb. 2018). arXiv:cs.CR\/1802.09517v1"},{"key":"e_1_3_2_1_27_1","volume-title":"Zimmer","author":"Shi Junjing","year":"2018","unstructured":"Junjing Shi, Qin Long, Liming Gao, Michael A. Rothman, and Vincent J. Zimmer. 2018. Methods and apparatus to protect memory from buffer overflow and\/or underflow. International patent WO\/2018\/176339."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00056"},{"volume-title":"SoK: sanitizing for security","author":"Song Dokyung","key":"e_1_3_2_1_29_1","unstructured":"Dokyung Song, Julian Lettner, Prabhu Rajasekaran, Yeoul Na, Stijn Volckaert, Per Larsen, and Michael Franz. 2019. SoK: sanitizing for security. In IEEE S&P '19: Proceedings of the 40th IEEE Symposium on Security and Privacy."},{"key":"e_1_3_2_1_30_1","unstructured":"David Weston and Matt Miller. 2016. Windows 10 mitigation improvements. Black Hat USA."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2914037"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853201"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304017"}],"event":{"name":"MICRO '52: The 52nd Annual IEEE\/ACM International Symposium on Microarchitecture","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"],"location":"Columbus OH USA","acronym":"MICRO '52"},"container-title":["Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358299","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3352460.3358299","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3352460.3358299","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,29]],"date-time":"2025-07-29T22:27:40Z","timestamp":1753828060000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358299"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,12]]},"references-count":33,"alternative-id":["10.1145\/3352460.3358299","10.1145\/3352460"],"URL":"https:\/\/doi.org\/10.1145\/3352460.3358299","relation":{},"subject":[],"published":{"date-parts":[[2019,10,12]]},"assertion":[{"value":"2019-10-12","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}