{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T14:53:44Z","timestamp":1777128824610,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":76,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,10,12]],"date-time":"2019-10-12T00:00:00Z","timestamp":1570838400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,10,12]]},"DOI":"10.1145\/3352460.3358306","type":"proceedings-article","created":{"date-parts":[[2019,10,11]],"date-time":"2019-10-11T11:16:45Z","timestamp":1570792605000},"page":"572-586","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":106,"title":["NDA"],"prefix":"10.1145","author":[{"given":"Ofir","family":"Weisse","sequence":"first","affiliation":[{"name":"University of Michigan"}]},{"given":"Ian","family":"Neal","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Kevin","family":"Loughlin","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Thomas F.","family":"Wenisch","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Baris","family":"Kasikci","sequence":"additional","affiliation":[{"name":"University of Michigan"}]}],"member":"320","published-online":{"date-parts":[[2019,10,12]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2019. InvisiSpec-1.0 source code. https:\/\/github.com\/mjyan0720\/InvisiSpec-1.0."},{"key":"e_1_3_2_1_2_1","unstructured":"2019. Lapidary: Crafting more beautiful gem5 simulations. https:\/\/medium.com\/@iangneal\/lapidary-crafting-more-beautiful-gem5-simulations-4bc6f6aad717."},{"key":"e_1_3_2_1_3_1","unstructured":"2019. Lapidary: creating beautiful gem5 simulations. https:\/\/github.com\/efeslab\/lapidary."},{"key":"e_1_3_2_1_4_1","volume-title":"Sohaib ul Hassan, Cesar Pereida Garcia, and Nicola Tuveri.","author":"Aldaya Alejandro Cabrera","year":"2018","unstructured":"Alejandro Cabrera Aldaya, Billy Bob Brumley, Sohaib ul Hassan, Cesar Pereida Garcia, and Nicola Tuveri. 2018. Port Contention for Fun and Profit. Cryptology ePrint Archive, Report 2018\/1060. https:\/\/eprint.iacr.org\/2018\/1060."},{"key":"e_1_3_2_1_5_1","volume-title":"Katrina E. Falkner, Joop van de Pol, and Yuval Yarom.","author":"Allan Thomas","year":"2016","unstructured":"Thomas Allan, Billy Bob Brumley, Katrina E. Falkner, Joop van de Pol, and Yuval Yarom. 2016. Amplifying side channels through performance degradation. In ACSAC. ACM, 422--435."},{"key":"e_1_3_2_1_6_1","unstructured":"AMD. 2018. Speculative Store Bypass Disable. https:\/\/developer.amd.com\/wp-content\/resources\/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf."},{"key":"e_1_3_2_1_7_1","unstructured":"Daniel J Bernstein. 2005. Cache-timing attacks on AES. (2005). http:\/\/palms.ee.princeton.edu\/system\/files\/Cache-timing+attacks+on+AES.pdf."},{"key":"e_1_3_2_1_8_1","volume-title":"SMoTher-Spectre: exploiting speculative execution through port contention. arXiv preprint arXiv:1903.01843","author":"Bhattacharyya Atri","year":"2019","unstructured":"Atri Bhattacharyya, Alexandra Sandulescu, Matthias Neugschwandtner, Alessandro Sorniotti, Babak Falsafi, Mathias Payer, and Anil Kurmus. 2019. SMoTher-Spectre: exploiting speculative execution through port contention. arXiv preprint arXiv:1903.01843 (2019)."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_16"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1455770.1455776"},{"key":"e_1_3_2_1_12_1","volume-title":"Michael Schwarz, Moritz Lipp, Benjamin von","author":"Canella Claudio","year":"2018","unstructured":"Claudio Canella, Jo Van Bulck, Michael Schwarz, Moritz Lipp, Benjamin von Berg, Philipp Ortner, Frank Piessens, Dmitry Evtyushkin, and Daniel Gruss. 2018. A Systematic Evaluation of Transient Execution Attacks and Defenses. arXiv preprint arXiv:1811.05441 (2018)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/EuroSP.2019.00020"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2004.1310765"},{"key":"e_1_3_2_1_15_1","unstructured":"Debian 2018. Debian Bug report logs - #886367 intel-microcode: spectre microcode updates. Debian. https:\/\/bugs.debian.org\/cgi-bin\/bugreport.cgi?bug=886367."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173204"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"crossref","unstructured":"Jacob Fustos Farzad Farshchi and Heechul Yun. 2019. SpectreGuard: An Efficient Data-centric Defense Mechanism against Spectre Attacks.. In DAC. 61--1.","DOI":"10.1145\/3316781.3317914"},{"key":"e_1_3_2_1_18_1","volume-title":"Constant-Time Callees with Variable-Time Callers. In USENIX Security Symposium. USENIX Association, 83--98","author":"Garcia Cesar Pereida","year":"2017","unstructured":"Cesar Pereida Garcia and Billy Bob Brumley. 2017. Constant-Time Callees with Variable-Time Callers. In USENIX Security Symposium. USENIX Association, 83--98."},{"key":"e_1_3_2_1_19_1","volume-title":"ACM Conference on Computer and Communications Security. ACM, 1639--1650","author":"Garcia Cesar Pereida","year":"2016","unstructured":"Cesar Pereida Garcia, Billy Bob Brumley, and Yuval Yarom. 2016. \"Make Sure DSA Signing Exponentiations Really are Constant-Time\". In ACM Conference on Computer and Communications Security. ACM, 1639--1650."},{"key":"e_1_3_2_1_20_1","unstructured":"Kourosh Gharachorloo Anoop Gupta and John L Hennessy. 1991. Two techniques to enhance the performance of memory consistency models. (1991). https:\/\/courses.engr.illinois.edu\/cs533\/sp2019\/reading_list\/gharachorloo91two.pdf."},{"key":"e_1_3_2_1_21_1","unstructured":"Google 2018. Retpoline: a software construct for preventing branch-target-injection. Google. https:\/\/support.google.com\/faqs\/answer\/7625886."},{"key":"e_1_3_2_1_22_1","unstructured":"Google 2018. Speculative Load Hardening. Google. https:\/\/docs.google.com\/document\/d\/1wwcfv3UV9ZnZVcGiGuoITT_61e_Ko3TmoCS3uXLcJR0\/edit#heading=h.phdehs44eom6."},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-62105-0_11"},{"key":"e_1_3_2_1_24_1","volume-title":"Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches. In USENIX Security Symposium. USENIX Association, 897--912","author":"Gruss Daniel","year":"2015","unstructured":"Daniel Gruss, Raphael Spreitzer, and Stefan Mangard. 2015. Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches. In USENIX Security Symposium. USENIX Association, 897--912."},{"key":"e_1_3_2_1_25_1","unstructured":"Intel 2018. Deep Dive: Intel Analysis of L1 Terminal Fault. Intel. https:\/\/software.intel.com\/security-software-guidance\/insights\/deep-dive-intel-analysis-l1-terminal-fault."},{"key":"e_1_3_2_1_26_1","unstructured":"Intel 2018. Details and Mitigation Information for Variant 4. Intel. https:\/\/newsroom.intel.com\/editorials\/addressing-new-research-for-side-channel-analysis\/#gs.4778nz."},{"key":"e_1_3_2_1_27_1","unstructured":"Intel. 2018. Intel Analysis of Speculative Execution Side Channels. https:\/\/software.intel.com\/security-software-guidance\/api-app\/sites\/default\/files\/336983-Intel-Analysis-of-Speculative-Execution-Side-Channels-White-Paper.pdf."},{"key":"e_1_3_2_1_28_1","unstructured":"Intel 2018. Retpoline: A Branch Target Injection Mitigation. Intel. https:\/\/software.intel.com\/sites\/default\/files\/managed\/1d\/46\/Retpoline-A-Branch-Target-Injection-Mitigation.pdf."},{"key":"e_1_3_2_1_29_1","unstructured":"Intel. 2018. Speculative Execution Side Channel Mitigations. https:\/\/software.intel.com\/security-software-guidance\/api-app\/sites\/default\/files\/336996-Speculative-Execution-Side-Channel-Mitigations.pdf."},{"key":"e_1_3_2_1_30_1","volume-title":"Thomas Eisenbarth, and Berk Sunar.","author":"Apecechea Gorka Irazoqui","year":"2014","unstructured":"Gorka Irazoqui Apecechea, Mehmet Sinan Inci, Thomas Eisenbarth, and Berk Sunar. 2014. Wait a Minute! A fast, Cross-VM Attack on AES. In RAID (Lecture Notes in Computer Science), Vol. 8688. Springer, 299--319."},{"key":"e_1_3_2_1_31_1","volume-title":"Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, and Nael Abu-Ghazaleh.","author":"Khasawneh Khaled N","year":"2018","unstructured":"Khaled N Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, and Nael Abu-Ghazaleh. 2018. SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation. arXiv preprint arXiv:1806.05179 (2018)."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00083"},{"key":"e_1_3_2_1_33_1","volume-title":"Speculative buffer overflows: Attacks and defenses. arXiv preprint arXiv:1807.03757","author":"Kiriansky Vladimir","year":"2018","unstructured":"Vladimir Kiriansky and Carl Waldspurger. 2018. Speculative buffer overflows: Attacks and defenses. arXiv preprint arXiv:1807.03757 (2018)."},{"key":"e_1_3_2_1_34_1","volume-title":"Spectre Attacks: Exploiting Speculative Execution. In 40th IEEE Symposium on Security and Privacy.","author":"Kocher Paul","year":"2019","unstructured":"Paul Kocher, Jann Horn, Anders Fogh, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, et al. 2019. Spectre Attacks: Exploiting Speculative Execution. In 40th IEEE Symposium on Security and Privacy."},{"key":"e_1_3_2_1_35_1","volume-title":"12th USENIX Workshop on Offensive Technologies, WOOT. 13--14","author":"Koruyeh Esmaeil Mohammadian","year":"2018","unstructured":"Esmaeil Mohammadian Koruyeh, Khaled N Khasawneh, Chengyu Song, and Nael Abu-Ghazaleh. 2018. Spectre returns! speculation attacks using the return stack buffer. In 12th USENIX Workshop on Offensive Technologies, WOOT. 13--14."},{"key":"e_1_3_2_1_36_1","volume-title":"27th USENIX Security Symposium (USENIX Security 18)","author":"Lipp Moritz","year":"2018","unstructured":"Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Anders Fogh, Jann Horn, Stefan Mangard, Paul Kocher, Daniel Genkin, et al. 2018. Meltdown: Reading kernel memory from user space. In 27th USENIX Security Symposium (USENIX Security 18). 973--990."},{"key":"e_1_3_2_1_37_1","unstructured":"LWN 2018. A page-table isolation update. LWN. https:\/\/lwn.net\/Articles\/752621\/."},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243761"},{"key":"e_1_3_2_1_39_1","volume-title":"13th USENIX Workshop on Offensive Technologies (WOOT 19)","author":"Mambretti Andrea","year":"2019","unstructured":"Andrea Mambretti, Alexandra Sandulescu, Matthias Neugschwandtner, Alessandro Sorniotti, and Anil Kurmus. 2019. Two methods for exploiting speculative control flow hijacks. In 13th USENIX Workshop on Offensive Technologies (WOOT 19)."},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-20550-2_3"},{"key":"e_1_3_2_1_41_1","volume-title":"Spectre is here to stay: An analysis of side-channels and speculative execution. arXiv preprint arXiv:1902.05178","author":"Mcilroy Ross","year":"2019","unstructured":"Ross Mcilroy, Jaroslav Sevcik, Tobias Tebbi, Ben L Titzer, and Toon Verwaest. 2019. Spectre is here to stay: An analysis of side-channels and speculative execution. arXiv preprint arXiv:1902.05178 (2019)."},{"key":"e_1_3_2_1_42_1","volume-title":"Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy. ACM","author":"McKeen Frank","unstructured":"Frank McKeen, Ilya Alexandrovich, Alex Berenzon, Carlos V Rozas, Hisham Shafi, Vedvyas Shanbhogue, and Uday R Savagaonkar. 2013. Innovative instructions and software model for isolated execution. In Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy. ACM. http:\/\/software.intel.com\/sites\/default\/files\/article\/413936\/hasp-2013-innovative-instructions-and-software-model-for-isolated-execution.pdf"},{"key":"e_1_3_2_1_43_1","unstructured":"Microsoft 2018. Mitigating speculative execution side channel hardware vulnerabilities. Microsoft. https:\/\/blogs.technet.microsoft.com\/srd\/2018\/03\/15\/mitigating-speculative-execution-side-channel-hardware-vulnerabilities\/."},{"key":"e_1_3_2_1_44_1","unstructured":"Microsoft 2018. Protect your Windows devices against Spectre and Meltdown. Microsoft. https:\/\/support.microsoft.com\/en-us\/help\/4073757\/protect-your-windows-devices-against-spectre-meltdown."},{"key":"e_1_3_2_1_45_1","volume-title":"Daniel Genkin, Daniel Gruss, Berk Sunar, Frank Piessens, and Yuval Yarom.","author":"Minkin Marina","year":"2019","unstructured":"Marina Minkin, Daniel Moghimi, Moritz Lipp, Michael Schwarz, Jo Van Bulck, Daniel Genkin, Daniel Gruss, Berk Sunar, Frank Piessens, and Yuval Yarom. 2019. Fallout: Reading Kernel Writes From User Space. (2019)."},{"key":"e_1_3_2_1_46_1","volume-title":"You Shall Not Bypass: Employing data dependencies to prevent Bounds Check Bypass. arXiv preprint arXiv:1805.08506","author":"Oleksenko Oleksii","year":"2018","unstructured":"Oleksii Oleksenko, Bohdan Trach, Tobias Reiher, Mark Silberstein, and Christof Fetzer. 2018. You Shall Not Bypass: Employing data dependencies to prevent Bounds Check Bypass. arXiv preprint arXiv:1805.08506 (2018)."},{"key":"e_1_3_2_1_47_1","volume-title":"Cryptographers' Track at the RSA Conference","author":"Osvik Dag Arne","unstructured":"Dag Arne Osvik, Adi Shamir, and Eran Tromer. 2006. Cache attacks and countermeasures: the case of AES. In Cryptographers' Track at the RSA Conference. Springer, 1--20."},{"key":"e_1_3_2_1_48_1","volume-title":"Proceedings of the 25th IEEE International Symposium on High-Performance Computer Architecture. IEEE.","author":"Lutan Zhao Peinan Li and CAS) Rui Hou (Institute of Information Engineering, CAS); Lixin Zhang (HXT Semiconductor Co.LTD); Dan Meng (Institute of Information Engineering.","year":"2019","unstructured":"Lutan Zhao Peinan Li and CAS) Rui Hou (Institute of Information Engineering, CAS); Lixin Zhang (HXT Semiconductor Co.LTD); Dan Meng (Institute of Information Engineering. 2019. Conditional Speculation: An Effective Approach to Safeguard Out-of-Order Execution Against Spectre Attacks. In Proceedings of the 25th IEEE International Symposium on High-Performance Computer Architecture. IEEE."},{"key":"e_1_3_2_1_49_1","volume-title":"Leon Groot Bruinderink, and Yuval Yarom","author":"Pessl Peter","year":"2017","unstructured":"Peter Pessl, Leon Groot Bruinderink, and Yuval Yarom. 2017. To BLISS-B or not to be: Attacking strongSwan's Implementation of Post-Quantum Signatures. In CCS. ACM, 1843--1855."},{"key":"e_1_3_2_1_50_1","volume-title":"USENIX Security Symposium. 565--581","author":"Pessl Peter","year":"2016","unstructured":"Peter Pessl, Daniel Gruss, Cl\u00e9mentine Maurice, Michael Schwarz, and Stefan Mangard. 2016. DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks.. In USENIX Security Symposium. 565--581."},{"key":"e_1_3_2_1_51_1","volume-title":"Proceedings of 51th International Symposium on Microarchitecture.","author":"Qureshi Moinuddin K","year":"2019","unstructured":"Moinuddin K Qureshi. 2019. CEASER: Mitigating Conflict-Based Cache Attacks via Encrypted-Address and Remapping. In Proceedings of 51th International Symposium on Microarchitecture."},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/2133375.2133377"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322216"},{"key":"e_1_3_2_1_54_1","volume-title":"Julian Stecklina, Thomas Prescher, and Daniel Gruss.","author":"Schwarz Michael","year":"2019","unstructured":"Michael Schwarz, Moritz Lipp, Daniel Moghimi, Jo Van Bulck, Julian Stecklina, Thomas Prescher, and Daniel Gruss. 2019. ZombieLoad: Cross-Privilege-Boundary Data Sampling. arXiv:1905.05726 (2019)."},{"key":"e_1_3_2_1_55_1","volume-title":"Net-spectre: Read arbitrary memory over network. arXiv preprint arXiv:1807.10535","author":"Schwarz Michael","year":"2018","unstructured":"Michael Schwarz, Martin Schwarzl, Moritz Lipp, and Daniel Gruss. 2018. Net-spectre: Read arbitrary memory over network. arXiv preprint arXiv:1807.10535 (2018)."},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1145\/1315245.1315313"},{"key":"e_1_3_2_1_57_1","volume-title":"Restricting Control Flow During Speculative Execution with Venkman. arXiv preprint arXiv:1903.10651","author":"Shen Zhuojia","year":"2019","unstructured":"Zhuojia Shen, Jie Zhou, Divya Ojha, and John Criswell. 2019. Restricting Control Flow During Speculative Execution with Venkman. arXiv preprint arXiv:1903.10651 (2019)."},{"key":"e_1_3_2_1_58_1","volume-title":"Standard Performance Evaluation Corporation SPEC CPU 2017","author":"SPEC.","year":"2017","unstructured":"SPEC. 2017. Standard Performance Evaluation Corporation SPEC CPU 2017. https:\/\/www.spec.org\/cpu2017\/."},{"key":"e_1_3_2_1_59_1","volume-title":"LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. arXiv preprint arXiv:1806.07480","author":"Stecklina Julian","year":"2018","unstructured":"Julian Stecklina and Thomas Prescher. 2018. LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. arXiv preprint arXiv:1806.07480 (2018)."},{"key":"e_1_3_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304060"},{"key":"e_1_3_2_1_61_1","unstructured":"Ubuntu 2018. Spectre And Meltdown. Ubuntu. https:\/\/wiki.ubuntu.com\/SecurityTeam\/KnowledgeBase\/SpectreAndMeltdown."},{"key":"e_1_3_2_1_62_1","volume-title":"Proceedings of the 27th USENIX Security Symposium. USENIX Association.","author":"Bulck Jo Van","year":"2018","unstructured":"Jo Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Thomas F Wenisch, Yuval Yarom, and Raoul Strackx. 2018. Foreshadow: Extracting the keys to the Intel SGX kingdom with transient out-of-order execution. In Proceedings of the 27th USENIX Security Symposium. USENIX Association."},{"key":"e_1_3_2_1_63_1","volume-title":"Nemesis: Studying Microarchitectural Timing Leaks in Rudimentary CPU Interrupt Logic.","author":"Bulck Jo Van","year":"2018","unstructured":"Jo Van Bulck, Frank Piessens, and Raoul Strackx. 2018. Nemesis: Studying Microarchitectural Timing Leaks in Rudimentary CPU Interrupt Logic. (2018)."},{"key":"e_1_3_2_1_64_1","volume-title":"RIDL: Rogue In-flight Data Load. In S&P.","author":"van Schaik Stephan","year":"2019","unstructured":"Stephan van Schaik, Alyssa Milburn, Sebastian \u00c3Ű sterlund, Pietro Frigo, Giorgi Maisuradze, Kaveh Razavi, Herbert Bos, and Cristiano Giuffrida. 2019. RIDL: Rogue In-flight Data Load. In S&P."},{"key":"e_1_3_2_1_65_1","volume-title":"Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom.","author":"Weisse Ofir","year":"2018","unstructured":"Ofir Weisse, Jo Van Bulck, Marina Minkin, Daniel Genkin, Baris Kasikci, Frank Piessens, Mark Silberstein, Raoul Strackx, Thomas F. Wenisch, and Yuval Yarom. 2018. Foreshadow-NG: Breaking the Virtual Memory Abstraction with Transient Out-of-Order Execution. Technical report (2018). See also USENIX Security paper Foreshadow [62]."},{"key":"e_1_3_2_1_66_1","volume-title":"USENIX Security symposium. 159--173","author":"Wu Zhenyu","year":"2012","unstructured":"Zhenyu Wu, Zhang Xu, and Haining Wang. 2012. Whispers in the Hyper-space: High-speed Covert Channel Attacks in the Cloud.. In USENIX Security symposium. 159--173."},{"key":"e_1_3_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859629"},{"key":"e_1_3_2_1_68_1","doi-asserted-by":"publisher","DOI":"10.1145\/2046660.2046670"},{"key":"e_1_3_2_1_69_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00042"},{"key":"e_1_3_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080222"},{"key":"e_1_3_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783742"},{"key":"e_1_3_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00004"},{"key":"e_1_3_2_1_73_1","unstructured":"Yuval Yarom and Katrina Falkner. 2014. Flush+Reload: a High Resolution Low Noise L3 Cache Side-Channel Attack. In USENIX Security. 719--732."},{"key":"e_1_3_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.491460"},{"key":"e_1_3_2_1_75_1","unstructured":"Project Zero. 2018. speculative execution variant 4: speculative store bypass. https:\/\/bugs.chromium.org\/p\/project-zero\/issues\/detail?id=1528."},{"key":"e_1_3_2_1_76_1","volume-title":"Cross-Tenant Side-Channel Attacks in PaaS Clouds. In ACM Conference on Computer and Communications Security. ACM, 990--1003","author":"Zhang Yinqian","year":"2014","unstructured":"Yinqian Zhang, Ari Juels, Michael K. Reiter, and Thomas Ristenpart. 2014. Cross-Tenant Side-Channel Attacks in PaaS Clouds. In ACM Conference on Computer and Communications Security. ACM, 990--1003."}],"event":{"name":"MICRO '52: The 52nd Annual IEEE\/ACM International Symposium on Microarchitecture","location":"Columbus OH USA","acronym":"MICRO '52","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"]},"container-title":["Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358306","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3352460.3358306","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,29]],"date-time":"2025-07-29T22:30:10Z","timestamp":1753828210000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358306"}},"subtitle":["Preventing Speculative Execution Attacks at Their Source"],"short-title":[],"issued":{"date-parts":[[2019,10,12]]},"references-count":76,"alternative-id":["10.1145\/3352460.3358306","10.1145\/3352460"],"URL":"https:\/\/doi.org\/10.1145\/3352460.3358306","relation":{},"subject":[],"published":{"date-parts":[[2019,10,12]]},"assertion":[{"value":"2019-10-12","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}