{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,20]],"date-time":"2026-06-20T16:23:01Z","timestamp":1781972581058,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":60,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,10,12]],"date-time":"2019-10-12T00:00:00Z","timestamp":1570838400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004543","name":"China Scholarship Council","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004543","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1910413, 1617071, 1725657, 1718080"],"award-info":[{"award-number":["1910413, 1617071, 1725657, 1718080"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012659","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61572411, 61772092"],"award-info":[{"award-number":["61572411, 61772092"]}],"id":[{"id":"10.13039\/501100012659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,10,12]]},"DOI":"10.1145\/3352460.3358323","type":"proceedings-article","created":{"date-parts":[[2019,10,11]],"date-time":"2019-10-11T11:16:45Z","timestamp":1570792605000},"page":"493-505","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":43,"title":["Constructing Large, Durable and Fast SSD System via Reprogramming 3D TLC Flash Memory"],"prefix":"10.1145","author":[{"given":"Congming","family":"Gao","sequence":"first","affiliation":[{"name":"Chongqing University University of Pittsburgh"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Min","family":"Ye","sequence":"additional","affiliation":[{"name":"YEESTOR Microelectronics Co., Ltd"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qiao","family":"Li","sequence":"additional","affiliation":[{"name":"City University of Hong Kong"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chun Jason","family":"Xue","sequence":"additional","affiliation":[{"name":"City University of Hong Kong"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Youtao","family":"Zhang","sequence":"additional","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Liang","family":"Shi","sequence":"additional","affiliation":[{"name":"East China Normal University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jun","family":"Yang","sequence":"additional","affiliation":[{"name":"University of Pittsburgh"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2019,10,12]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Annual Technical Conference. USENIX.","author":"Agrawal Nitin","year":"2008","unstructured":"Nitin Agrawal, Vijayan Prabhakaran, Ted Wobber, John D Davis, Mark S Manasse, and Rina Panigrahy. 2008. Design tradeoffs for SSD performance.. In Annual Technical Conference. USENIX."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"crossref","unstructured":"Svante Arrhenius. 1889. \u00dcber die Reaktionsgeschwindigkeit bei der Inversion von Rohrzucker durch S\u00e4uren. In Zeitschrift f\u00fcr physikalische Chemie. De Gruyter Oldenbourg.","DOI":"10.1515\/zpch-1889-0116"},{"key":"e_1_3_2_1_3_1","unstructured":"JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. 2011. JEDEC STANDARD:Stress-Test-Driven Qualification of Integrated Circuits JESD47H.01. JEDEC."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2713127"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.61"},{"key":"e_1_3_2_1_6_1","volume-title":"Dependable Systems and Networks","author":"Cai Yu","unstructured":"Yu Cai, Yixin Luo, Saugata Ghose, and Onur Mutlu. 2015. Read disturb errors in MLC NAND flash memory: Characterization, mitigation, and recovery. In Dependable Systems and Networks. IEEE."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657034"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"crossref","unstructured":"Li-Pin Chang Tei-Wei Kuo and Shi-Wu Lo. 2004. Real-time garbage collection for flash-memory storage systems of real-time embedded systems. In Transactions on Embedded Computing Systems. ACM.","DOI":"10.1145\/1027794.1027801"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278480.1278533"},{"key":"e_1_3_2_1_10_1","volume-title":"Hardware\/Software Codesign and System Synthesis","author":"Chang Yu-Ming","unstructured":"Yu-Ming Chang, Yung-Chun Li, Ping-Hsien Lin, Hsiang-Pang Li, and Yuan-Hao Chang. 2016. Realizing erase-free SLC flash memory with rewritable programming design. In Hardware\/Software Codesign and System Synthesis. IEEE."},{"key":"e_1_3_2_1_11_1","volume-title":"The design and evaluation of RAID 5 and parity striping disk array architectures. In booktitle of Parallel and Distributed Computing","author":"Chen SZ","unstructured":"SZ Chen and Don Towsley. 1993. The design and evaluation of RAID 5 and parity striping disk array architectures. In booktitle of Parallel and Distributed Computing. Elsevier."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062339"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-TSA.2014.6839661"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/3078505.3078527"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00046"},{"key":"e_1_3_2_1_16_1","volume-title":"Partial parity cache and data cache management method to improve the performance of an SSD-based RAID","author":"Chung Ching-Che","unstructured":"Ching-Che Chung and Hao-Hsiang Hsu. 2014. Partial parity cache and data cache management method to improve the performance of an SSD-based RAID. In IEEE Transactions on Very Large Scale Integration Systems. IEEE."},{"key":"e_1_3_2_1_17_1","unstructured":"Wikipedia contributors. 2019. Pareto principle. https:\/\/en.wikipedia.org\/w\/index.php?title=Pareto_principle&oldid=904233270."},{"key":"e_1_3_2_1_18_1","unstructured":"Western Digital. 2017. Western Digital Announces Industry's First 96-Layer 3D NAND Technology. https:\/\/www.westerndigital.com\/company\/newsroom\/press-releases\/2017\/2017-06-27-western-digital-announces-industrys-first-96-layer-3d-nand-technology."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/NVMSA.2018.00018"},{"key":"e_1_3_2_1_20_1","volume-title":"Proceedings of the 2018 on Great Lakes Symposium on VLSI. ACM.","author":"Gao Congming","unstructured":"Congming Gao, Liang Shi, Yejia Di, Qiao Li, Chun Jason Xue, and Edwin H.-M. Sha. 2018. An Efficient Cache Management Scheme for Capacitor Equipped Solid State Drives. In Proceedings of the 2018 on Great Lakes Symposium on VLSI. ACM."},{"key":"e_1_3_2_1_21_1","volume-title":"Kaijie Wu, and Edwin Sha.","author":"Gao Congming","year":"2018","unstructured":"Congming Gao, Liang Shi, Yejia Di, Qiao Li, Chun Jason Xue, Kaijie Wu, and Edwin Sha. 2018. Exploiting Chip Idleness for Minimizing Garbage Collection Induced Chip Access Conflict on SSDs. In Transactions on Design Automation of Electronic Systems. ACM."},{"key":"e_1_3_2_1_22_1","volume-title":"Chun Jason Xue, and Edwin H-M Sha","author":"Gao Congming","year":"2018","unstructured":"Congming Gao, Liang Shi, Cheng Ji, Yejia Di, Kaijie Wu, Chun Jason Xue, and Edwin H-M Sha. 2018. Exploiting parallelism for access conflict minimization in flash-based solid state drives. In Transactions on Computer-Aided Design of Integrated Circuits and Systems. IEEE."},{"key":"e_1_3_2_1_23_1","volume-title":"Cheng Ji, Jun Yang, and Youtao Zhang.","author":"Gao Congming","year":"2019","unstructured":"Congming Gao, Liang Shi, Jason Chun Xue, Cheng Ji, Jun Yang, and Youtao Zhang. 2019. Parallel all the time: Plane Level Parallelism Exploration for High Performance SSDs. In Mass Storage Systems and Technologies. IEEE."},{"key":"e_1_3_2_1_24_1","volume-title":"Kaijie Wu, and Edwin H-M Sha.","author":"Gao Congming","year":"2014","unstructured":"Congming Gao, Liang Shi, Mengying Zhao, Chun Jason Xue, Kaijie Wu, and Edwin H-M Sha. 2014. Exploiting parallelism in I\/O scheduling for access conflict minimization in flash-based solid state drives. In Mass Storage Systems and Technologies. IEEE."},{"key":"e_1_3_2_1_25_1","unstructured":"Erich F. Haratsch. 2017. Controller Technologies for Managing 3D NAND Flash Memories. In Seagate. Flash Memory Summit."},{"key":"e_1_3_2_1_26_1","volume-title":"Design Automation Conference. IEEE.","author":"Ho Chien-Chung","year":"2018","unstructured":"Chien-Chung Ho, Yung-Chun Li, Yuan-Hao Chang, and Yu-Ming Chang. 2018. Achieving defect-free multilevel 3D flash memories with one-shot program design. In Design Automation Conference. IEEE."},{"key":"e_1_3_2_1_27_1","unstructured":"Joel Hruska. 2018. Samsung Now Mass Producing 96-Layer 3D NAND. https:\/\/www.extremetech.com\/computing\/273167-samsung-now-mass-producing-96-layer\/-3d-nand."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995912"},{"key":"e_1_3_2_1_29_1","volume-title":"Transactions on Computers","author":"Im Soojun","unstructured":"Soojun Im and Dongkun Shin. 2011. Flash-aware RAID techniques for dependable and high-performance flash memory SSD. In Transactions on Computers. IEEE."},{"key":"e_1_3_2_1_30_1","volume-title":"Symposium on VLSI Technology. IEEE.","author":"Jang Jaehoon","year":"2009","unstructured":"Jaehoon Jang, Han-Soo Kim, Wonseok Cho, Hoosung Cho, Jinho Kim, Sun Il Shim, Jae-Hun Jeong, Byoung-Keun Son, Dong Woo Kim, Jae-Joo Shim, et al. 2009. Vertical cell array using TCAT (Terabit Cell Array Transistor) technology for ultra high density NAND flash memory. In Symposium on VLSI Technology. IEEE."},{"key":"e_1_3_2_1_31_1","volume-title":"Conference on File and Storage Technologies. USENIX.","author":"Jeong Jaeyong","year":"2014","unstructured":"Jaeyong Jeong, Sangwook Shane Hahn, Sungjin Lee, and Jihong Kim. 2014. Lifetime improvement of NAND flash-based storage systems using dynamic program and erase scaling.. In Conference on File and Storage Technologies. USENIX."},{"key":"e_1_3_2_1_32_1","unstructured":"Timothy J Johnson. 1998. Raid-5 parity generation and data reconstruction. US Patent 5 805 788."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"crossref","unstructured":"Tae-Sung Jung Young-Joon Choi Kang-Deog Suh Byung-Hoon Suh Jin-Ki Kim Young-Ho Lim Yong-Nam Koh Jong-Wook Park Ki-Jong Lee Jung-Hoon Park et al. 1996. A 117-mm\/sup 2\/3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications. In IEEE booktitle of Solid-State Circuits. IEEE.","DOI":"10.1109\/JSSC.1996.542301"},{"key":"e_1_3_2_1_34_1","volume-title":"International Solid-State Circuits Conference. IEEE.","author":"Kim C.","unstructured":"C. Kim, J. Cho, W. Jeong, I. Park, H. Park, D. Kim, D. Kang, S. Lee, J. Lee, W. Kim, J. Park, Y. Ahn, J. Lee, J. Lee, S. Kim, H. Yoon, J. Yu, N. Choi, Y. Kwon, N. Kim, H. Jang, J. Park, S. Song, Y. Park, J. Bang, S. Hong, B. Jeong, H. Kim, C. Lee, Y. Min, I. Lee, I. Kim, S. Kim, D. Yoon, K. Kim, Y. Choi, M. Kim, H. Kim, P. Kwak, J. Ihm, D. Byeon, J. Lee, K. Park, and K. Kyung. [n. d.]. 11.4 A 512Gb 3b\/cell 64-stacked WL 3D V-NAND flash memory. In International Solid-State Circuits Conference. IEEE."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939081"},{"key":"e_1_3_2_1_36_1","volume-title":"Automation & Test in Europe Conference & Exhibition. IEEE.","author":"Kim Jung-Hoon","year":"2015","unstructured":"Jung-Hoon Kim, Sang-Hoon Kim, and Jin-Soo Kim. 2015. Subpage programming for extending the lifetime of nand flash memory. In Design, Automation & Test in Europe Conference & Exhibition. IEEE."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062264"},{"key":"e_1_3_2_1_38_1","volume-title":"International Solid-State Circuits Conference. IEEE.","author":"Lee Seungjae","year":"2016","unstructured":"Seungjae Lee, Jin-yub Lee, Il-han Park, Jongyeol Park, Sung-won Yun, Min-su Kim, Jong-hoon Lee, Minseok Kim, Kangbin Lee, Taeeun Kim, et al. 2016. 7.5 A 128Gb 2b\/cell NAND flash memory in 14nm technology with tPROG= 640μs and 800MB\/s I\/O rate. In International Solid-State Circuits Conference. IEEE."},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/1376616.1376723"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2016.52"},{"key":"e_1_3_2_1_41_1","volume-title":"Conference on File and Storage Technologies. USENIX.","author":"Kotra Jagadish","year":"2018","unstructured":"Chun-yi Liu, Jagadish Kotra, Myoungsoo Jung, and Mahmut Kandemir. 2018. PEN: design and evaluation of partial-erase for 3D NAND-based high density SSDs. In Conference on File and Storage Technologies. USENIX."},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2015.7208278"},{"key":"e_1_3_2_1_43_1","volume-title":"Conference on File and Storage Technologies.","author":"Margaglia Fabio","year":"2016","unstructured":"Fabio Margaglia, Gala Yadgar, Eitan Yaakobi, Yue Li, Assaf Schuster, and Andr\u00e9 Brinkmann. 2016. The Devil Is in the Details: Implementing Flash Page Reuse with WOM Codes.. In Conference on File and Storage Technologies."},{"key":"e_1_3_2_1_44_1","volume-title":"Annual Technical Conference. USENIX.","author":"Meng Fei","year":"2014","unstructured":"Fei Meng, Li Zhou, Xiaosong Ma, Sandeep Uttamchandani, and Deng Liu. 2014. vCacheShare: Automated Server Flash Cache Space Management in a Virtualization Environment.. In Annual Technical Conference. USENIX."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"crossref","unstructured":"Rino Micheloni et al. 2016. 3D Flash memories. Springer.","DOI":"10.1007\/978-94-017-7512-0"},{"key":"e_1_3_2_1_46_1","volume-title":"Inside NAND flash memories","author":"Micheloni Rino","unstructured":"Rino Micheloni, Luca Crippa, and Alessia Marelli. 2010. Inside NAND flash memories. Springer Science & Business Media."},{"key":"e_1_3_2_1_47_1","volume-title":"Inside solid state drives (SSDs)","author":"Micheloni Rino","unstructured":"Rino Micheloni, Alessia Marelli, and Kam Eshghi. 2013. Inside solid state drives (SSDs). Springer."},{"key":"e_1_3_2_1_48_1","unstructured":"Micron. 2018. MT29F1T08EEHAFJ4-3R 3D TLC NAND Flash. https:\/\/www.micron.com\/products\/nand-flash\/3d-nand\/part-catalog\/mt29f1t08eehafj4-3r."},{"key":"e_1_3_2_1_49_1","volume-title":"Transactions on Device and Materials Reliability","author":"Mielke Neal","unstructured":"Neal Mielke, Hanmant Belgal, Ivan Kalastirsky, Pranav Kalavade, Andrew Kurtz, Qingru Meng, Nick Righos, and Jie Wu. 2004. Flash EEPROM threshold instabilities due to charge trapping during program\/erase cycling. In Transactions on Device and Materials Reliability. IEEE."},{"key":"e_1_3_2_1_50_1","volume-title":"Workshop on Hot Topics in Storage and File Systems. USENIX.","author":"Moon Sangwhan","unstructured":"Sangwhan Moon and A. L. Narasimha Reddy. 2013. Don't Let RAID Raid the Lifetime of Your SSD Array. In Workshop on Hot Topics in Storage and File Systems. USENIX."},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1145\/1519065.1519081"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-21599-5_14"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.5555\/3014904.3014969"},{"key":"e_1_3_2_1_54_1","volume-title":"Kaijie Wu, and Edwin H-M Sha.","author":"Shi Liang","year":"2015","unstructured":"Liang Shi, Yejia Di, Mengying Zhao, Chun Jason Xue, Kaijie Wu, and Edwin H-M Sha. 2015. Exploiting process variation for write performance improvement on NAND flash memory storage systems. In Transactions on Very Large Scale Integration (VLSI) Systems. IEEE."},{"key":"e_1_3_2_1_55_1","volume-title":"Networking, Architecture and Storage","author":"Tjioe Jonathan","unstructured":"Jonathan Tjioe, Andr\u00e9s Blanco, Tao Xie, and Yiming Ouyang. 2012. Making garbage collection wear conscious for flash SSD. In Networking, Architecture and Storage. IEEE."},{"key":"e_1_3_2_1_56_1","volume-title":"Proceedings of language evolution and computation workshop\/course at ESSLLI.","author":"Tullo Catriona","year":"2003","unstructured":"Catriona Tullo and James Hurford. 2003. Modelling Zipfian distributions in language. In Proceedings of language evolution and computation workshop\/course at ESSLLI."},{"key":"e_1_3_2_1_57_1","volume-title":"Performance Evaluation","author":"Houdt Benny Van","unstructured":"Benny Van Houdt. 2013. Performance of garbage collection algorithms for flash-based solid state drives with hot\/cold data. In Performance Evaluation. Elsevier."},{"key":"e_1_3_2_1_58_1","volume-title":"Conference on File and Storage Technologies.","author":"Yadgar Gala","year":"2015","unstructured":"Gala Yadgar, Eitan Yaakobi, and Assaf Schuster. 2015. Write Once, Get 50% Free: Saving SSD Erase Costs Using WOM Codes. In Conference on File and Storage Technologies."},{"key":"e_1_3_2_1_59_1","unstructured":"YEESTOR. 2018. YS9083XT\/YS9081XT SSD Platform. http:\/\/www.yeestor.com\/index-product-info-id-946-cid-33-pid-3-infopid-33.html."},{"key":"e_1_3_2_1_60_1","unstructured":"Jung H Yoon Ranjana Godse Gary Tressler and Hillery Hunter. 2017. 3D-NAND scaling & 3D-SCM--Implications to Enterprise Storage. In Flash Memory Summit."}],"event":{"name":"MICRO '52: The 52nd Annual IEEE\/ACM International Symposium on Microarchitecture","location":"Columbus OH USA","acronym":"MICRO '52","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"]},"container-title":["Proceedings of the 52nd Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358323","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3352460.3358323","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3352460.3358323","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,29]],"date-time":"2025-07-29T22:25:22Z","timestamp":1753827922000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3352460.3358323"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,12]]},"references-count":60,"alternative-id":["10.1145\/3352460.3358323","10.1145\/3352460"],"URL":"https:\/\/doi.org\/10.1145\/3352460.3358323","relation":{},"subject":[],"published":{"date-parts":[[2019,10,12]]},"assertion":[{"value":"2019-10-12","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}