{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:46:51Z","timestamp":1750308411981,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":17,"publisher":"ACM","license":[{"start":{"date-parts":[[2019,10,13]],"date-time":"2019-10-13T00:00:00Z","timestamp":1570924800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2019,10,13]]},"DOI":"10.1145\/3356045.3360719","type":"proceedings-article","created":{"date-parts":[[2019,11,8]],"date-time":"2019-11-08T20:23:51Z","timestamp":1573244631000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Virtual circuit switch based orderly delivery of packets in adaptive NoC routing"],"prefix":"10.1145","author":[{"given":"Tuhin Subhra","family":"Das","sequence":"first","affiliation":[{"name":"Indian Institute of Engineering Science and Technology, Shibpur, Howrah, WB, India"}]},{"given":"Prasun","family":"Ghosal","sequence":"additional","affiliation":[{"name":"Indian Institute of Engineering Science and Technology, Shibpur, Howrah, WB, India"}]},{"given":"Navonil","family":"Chatterjee","sequence":"additional","affiliation":[{"name":"Universit\u00e9 Bretagne Sud, Lorient, France"}]}],"member":"320","published-online":{"date-parts":[[2019,10,13]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"70","article-title":"Networks on chips: A new soc paradigm","author":"Benini L.","year":"2003","unstructured":"L. Benini and G. D. Micheli , \" Networks on chips: A new soc paradigm ,\" in In IEEE Computer , 2003 , pp. 70 -- 78 . L. Benini and G. D. Micheli, \"Networks on chips: A new soc paradigm,\" in In IEEE Computer, 2003, pp. 70--78.","journal-title":"IEEE Computer"},{"key":"e_1_3_2_1_2_1","first-page":"337","volume-title":"3d noc: a promising alternative for tomorrow's nanosystem design","author":"Ghosal P.","year":"2016","unstructured":"P. Ghosal , T. S. Das , S. Poddar , M. M. Rahaman , and A. Bose , \" 3d noc: a promising alternative for tomorrow's nanosystem design ,\" pp. 337 -- 377 , 2016 . [Online]. Available: http:\/\/digital-library.theiet.org\/;jsessionid=40cw6lg2qgto2.x-iet-live-01content\/books\/10.1049\/pbcs030e_ch11 P. Ghosal, T. S. Das, S. Poddar, M. M. Rahaman, and A. Bose, \"3d noc: a promising alternative for tomorrow's nanosystem design,\" pp. 337--377, 2016. [Online]. Available: http:\/\/digital-library.theiet.org\/;jsessionid=40cw6lg2qgto2.x-iet-live-01content\/books\/10.1049\/pbcs030e_ch11"},{"key":"e_1_3_2_1_3_1","unstructured":"\"International Technology Roadmap for Semiconductors \" Online. [Online]. Available: http:\/\/www.itrs2.net\/itrs-reports.html \"International Technology Roadmap for Semiconductors \" Online. [Online]. Available: http:\/\/www.itrs2.net\/itrs-reports.html"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1201\/b15268-17"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/37627"},{"key":"e_1_3_2_1_6_1","first-page":"1","volume-title":"Nov 2009","author":"Ebrahimi M.","unstructured":"M. Ebrahimi , M. Daneshtalab , N. P. Sreejesh , P. Liljeberg , and H. Tenhunen , \" Efficient network interface architecture for network-on-chips,\" in 2009 NORCHIP , Nov 2009 , pp. 1 -- 4 . M. Ebrahimi, M. Daneshtalab, N. P. Sreejesh, P. Liljeberg, and H. Tenhunen, \"Efficient network interface architecture for network-on-chips,\" in 2009 NORCHIP, Nov 2009, pp. 1--4."},{"key":"e_1_3_2_1_7_1","first-page":"10","volume-title":"April 2005","author":"Martinez J. C.","unstructured":"J. C. Martinez , J. Flich , A. Robles , P. Lopez , J. Duato , and M. Koibuchi , \" In-order packet delivery in interconnection networks using adaptive routing,\" in 19th IEEE International Parallel and Distributed Processing Symposium , April 2005 , pp. 10 pp.-. J. C. Martinez, J. Flich, A. Robles, P. Lopez, J. Duato, and M. Koibuchi, \"In-order packet delivery in interconnection networks using adaptive routing,\" in 19th IEEE International Parallel and Distributed Processing Symposium, April 2005, pp. 10 pp.-."},{"key":"e_1_3_2_1_8_1","first-page":"311","volume-title":"June 2010","author":"Lis M.","unstructured":"M. Lis , M. H. Cho , K. S. Shim , and S. Devadas , \" Path-diverse in-order routing,\" in The 2010 International Conference on Green Circuits and Systems , June 2010 , pp. 311 -- 316 . M. Lis, M. H. Cho, K. S. Shim, and S. Devadas, \"Path-diverse in-order routing,\" in The 2010 International Conference on Green Circuits and Systems, June 2010, pp. 311--316."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837315"},{"key":"e_1_3_2_1_10_1","first-page":"255","volume-title":"HPCA. The Seventh International Symposium on. IEEE","author":"Peh L.-S.","year":"2001","unstructured":"L.-S. Peh and W.J. Dally , \" A delay model and speculative architecture for pipelined routers,\" in High-Performance Computer Architecture, 2001 . HPCA. The Seventh International Symposium on. IEEE , 2001 , pp. 255 -- 266 . L.-S. Peh and W.J. Dally, \"A delay model and speculative architecture for pipelined routers,\" in High-Performance Computer Architecture, 2001. HPCA. The Seventh International Symposium on. IEEE, 2001, pp. 255--266."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1080\/00207210701306462"},{"key":"e_1_3_2_1_12_1","first-page":"131","volume-title":"March 2018","author":"Dai J.","unstructured":"J. Dai , R. Li , X. Jiang , and T. Watanabe , \" Pda-hypar: Path-diversity-aware hybrid planar adaptive routing algorithm for 3d nocs,\" in 2018 19th International Symposium on Quality Electronic Design (ISQED) , March 2018 , pp. 131 -- 137 . J. Dai, R. Li, X. Jiang, and T. Watanabe, \"Pda-hypar: Path-diversity-aware hybrid planar adaptive routing algorithm for 3d nocs,\" in 2018 19th International Symposium on Quality Electronic Design (ISQED), March 2018, pp. 131--137."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.5555\/1951725"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/2629677"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_3_2_1_16_1","first-page":"24","volume-title":"Proceedings., 22nd Annual International Symposium on","author":"Woo S.","year":"1995","unstructured":"S. Woo , M. Ohara , E. Torrie , J. Singh , and A. Gupta , \" The splash-2 programs: characterization and methodological considerations,\" in Computer Architecture, 1995 . Proceedings., 22nd Annual International Symposium on , June 1995 , pp. 24 -- 36 . S. Woo, M. Ohara, E. Torrie, J. Singh, and A. Gupta, \"The splash-2 programs: characterization and methodological considerations,\" in Computer Architecture, 1995. Proceedings., 22nd Annual International Symposium on, June 1995, pp. 24--36."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2953878"}],"event":{"name":"MICRO '52: The 52nd Annual IEEE\/ACM International Symposium on Microarchitecture","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"],"location":"Columbus Ohio","acronym":"MICRO '52"},"container-title":["Proceedings of the 12th International Workshop on Network on Chip Architectures"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3356045.3360719","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3356045.3360719","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T17:49:08Z","timestamp":1750268948000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3356045.3360719"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,13]]},"references-count":17,"alternative-id":["10.1145\/3356045.3360719","10.1145\/3356045"],"URL":"https:\/\/doi.org\/10.1145\/3356045.3360719","relation":{},"subject":[],"published":{"date-parts":[[2019,10,13]]},"assertion":[{"value":"2019-10-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}