{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,23]],"date-time":"2026-09-23T09:02:16Z","timestamp":1790154136658,"version":"4.0.1"},"reference-count":23,"publisher":"Association for Computing Machinery (ACM)","issue":"5s","license":[{"start":{"date-parts":[[2019,10,8]],"date-time":"2019-10-08T00:00:00Z","timestamp":1570492800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100008952","name":"Agence Nationale de la Recherche","doi-asserted-by":"publisher","award":["ANR-15-CE25-0015"],"award-info":[{"award-number":["ANR-15-CE25-0015"]}],"id":[{"id":"10.13039\/501100008952","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100007601","name":"Horizon 2020 Framework Programme","doi-asserted-by":"publisher","award":["732105"],"award-info":[{"award-number":["732105"]}],"id":[{"id":"10.13039\/501100007601","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2019,10,31]]},"abstract":"<jats:p>Stream processing applications running on Heterogeneous Multi-Processor Systems on Chips (HMPSoCs) require efficient resource allocation and management, both at compile-time and at runtime. To cope with modern adaptive applications whose behavior can not be exhaustively predicted at compile-time, runtime managers must be able to take resource allocation decisions on-the-fly, with a minimum overhead on application performance.<\/jats:p>\n          <jats:p>Resource allocation algorithms often rely on an internal modeling of an application. Directed Acyclic Graph (DAGs) are the most commonly used models for capturing control and data dependencies between tasks. DAGs are notably often used as an intermediate representation for deploying applications modeled with a dataflow Model of Computation (MoC) on HMPSoCs. Building such intermediate representation at runtime for massively parallel applications is costly both in terms of computation and memory overhead.<\/jats:p>\n          <jats:p>In this paper, an intermediate representation of DAGs for resource allocation is presented. This new representation shows improved performance for run-time analysis of dataflow graphs with less overhead in both computation time and memory footprint. The performances of the proposed representation are evaluated on a set of computer vision and machine learning applications.<\/jats:p>","DOI":"10.1145\/3358225","type":"journal-article","created":{"date-parts":[[2019,10,10]],"date-time":"2019-10-10T13:13:05Z","timestamp":1570713185000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Numerical Representation of Directed Acyclic Graphs for Efficient Dataflow Embedded Resource Allocation"],"prefix":"10.1145","volume":"18","author":[{"given":"Florian","family":"Arrestier","sequence":"first","affiliation":[{"name":"Univ Rennes, INSA Rennes, CNRS, IETR - UMR 6164, Rennes, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Karol","family":"Desnos","sequence":"additional","affiliation":[{"name":"Univ Rennes, INSA Rennes, CNRS, IETR - UMR 6164, Rennes, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Eduardo","family":"Juarez","sequence":"additional","affiliation":[{"name":"Universidad Polit\u00e9cnica de Madrid, CITSEM, Madrid, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Daniel","family":"Menard","sequence":"additional","affiliation":[{"name":"Univ Rennes, INSA Rennes, CNRS, IETR - UMR 6164, Rennes, France"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2019,10,8]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Matin Abadi et al. 2016. TensorFlow: A system for large-scale machine learning. 265--283.  Matin Abadi et al. 2016. TensorFlow: A system for large-scale machine learning. 265--283."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/3229631.3229645"},{"key":"e_1_2_1_3_1","doi-asserted-by":"crossref","unstructured":"C\u00e9dric Augonnet Samuel Thibault Raymond Namyst and Pierre-Andr\u00e9 Wacrenier. 2009. StarPU: A unified platform for task scheduling on heterogeneous multicore architectures. (2009) 16.  C\u00e9dric Augonnet Samuel Thibault Raymond Namyst and Pierre-Andr\u00e9 Wacrenier. 2009. StarPU: A unified platform for task scheduling on heterogeneous multicore architectures. (2009) 16.","DOI":"10.1007\/978-3-642-03869-3_80"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/78.950795"},{"key":"e_1_2_1_5_1","volume-title":"Murphy","author":"Bhattacharyya Shuvra S.","year":"1996","unstructured":"Shuvra S. Bhattacharyya , Edward A. Lee , and Praveen K . Murphy . 1996 . Software Synthesis from Dataflow Graphs. Kluwer Academic Publishers , Norwell, MA, USA. Shuvra S. Bhattacharyya, Edward A. Lee, and Praveen K. Murphy. 1996. Software Synthesis from Dataflow Graphs. Kluwer Academic Publishers, Norwell, MA, USA."},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/78.485935"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2265852"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2017.8344630"},{"key":"e_1_2_1_9_1","volume-title":"2013 International Conference on. IEEE, 41--48","author":"Desnos Karol","year":"2013","unstructured":"Karol Desnos , Maxime Pelcat , Jean-Fran\u00e7ois Nezan , Shuvra S. Bhattacharyya , and Slaheddine Aridhi . 2013 . Pimm: Parameterized and interfaced dataflow meta-model for mpsocs runtime reconfiguration. In Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII) , 2013 International Conference on. IEEE, 41--48 . Karol Desnos, Maxime Pelcat, Jean-Fran\u00e7ois Nezan, Shuvra S. Bhattacharyya, and Slaheddine Aridhi. 2013. Pimm: Parameterized and interfaced dataflow meta-model for mpsocs runtime reconfiguration. In Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on. IEEE, 41--48."},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/2492708.2492900"},{"key":"e_1_2_1_11_1","volume-title":"2013 IEEE 27th International Symposium on. IEEE, 1299--1308","author":"Gautier Thierry","year":"2013","unstructured":"Thierry Gautier , Joao VF Lima , Nicolas Maillard , and Bruno Raffin . 2013 . Xkaapi: A runtime system for data-flow task programming on heterogeneous architectures. In Parallel 8 Distributed Processing (IPDPS) , 2013 IEEE 27th International Symposium on. IEEE, 1299--1308 . Thierry Gautier, Joao VF Lima, Nicolas Maillard, and Bruno Raffin. 2013. Xkaapi: A runtime system for data-flow task programming on heterogeneous architectures. In Parallel 8 Distributed Processing (IPDPS), 2013 IEEE 27th International Symposium on. IEEE, 1299--1308."},{"key":"e_1_2_1_12_1","unstructured":"Kronos Group. 2013. The OpenVX API for hardware acceleration. In http:\/\/www.khronos.org\/openvx.  Kronos Group. 2013. The OpenVX API for hardware acceleration. In http:\/\/www.khronos.org\/openvx."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/EDERC.2014.6924381"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2006.1660798"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1987.13876"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.381846"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/EDERC.2014.6924354"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2009.5336240"},{"key":"e_1_2_1_20_1","volume-title":"Lee","author":"Pino Jos\u00e9 Luis","year":"1995","unstructured":"Jos\u00e9 Luis Pino , Shuvra S. Bhattacharyya , and Edward A . Lee . 1995 . A Hierarchical Multiprocessor Scheduling Framework for Synchronous Dataflow Graphs. Electronics Research Laboratory, College of Engineering, University of California . Jos\u00e9 Luis Pino, Shuvra S. Bhattacharyya, and Edward A. Lee. 1995. A Hierarchical Multiprocessor Scheduling Framework for Synchronous Dataflow Graphs. Electronics Research Laboratory, College of Engineering, University of California."},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.1993.397152"},{"key":"e_1_2_1_22_1","volume-title":"Bhattacharyya","author":"Wu Jiahao","year":"2018","unstructured":"Jiahao Wu , Timothy Blattner , Walid Keyrouz , and Shuvra S . Bhattacharyya . 2018 . A design tool for high performance image processing on multicore platforms. In 2018 Design, Automation 8 Test in Europe Conference 8 Exhibition (DATE). IEEE, Dresden, Germany , 1304--1309. DOI:https:\/\/doi.org\/10.23919\/DATE.2018.8342215 10.23919\/DATE.2018.8342215 Jiahao Wu, Timothy Blattner, Walid Keyrouz, and Shuvra S. Bhattacharyya. 2018. A design tool for high performance image processing on multicore platforms. In 2018 Design, Automation 8 Test in Europe Conference 8 Exhibition (DATE). IEEE, Dresden, Germany, 1304--1309. DOI:https:\/\/doi.org\/10.23919\/DATE.2018.8342215"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2012.14"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-016-1107-8"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3358225","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3358225","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:23:07Z","timestamp":1750202587000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3358225"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10,8]]},"references-count":23,"journal-issue":{"issue":"5s","published-print":{"date-parts":[[2019,10,31]]}},"alternative-id":["10.1145\/3358225"],"URL":"https:\/\/doi.org\/10.1145\/3358225","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"value":"1539-9087","type":"print"},{"value":"1558-3465","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,10,8]]},"assertion":[{"value":"2019-04-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-10-08","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}