{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:29:27Z","timestamp":1750220967055,"version":"3.41.0"},"reference-count":25,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2019,11,18]],"date-time":"2019-11-18T00:00:00Z","timestamp":1574035200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2019,12,31]]},"abstract":"<jats:p>\n            Computer vision and machine learning algorithms operating under a\n            <jats:italic>strict<\/jats:italic>\n            power budget require an alternate computing paradigm. While bitstream computing (BC) satisfies these constraints, creating BC systems is difficult. To address the design challenges, we propose compiler extensions to B\n            <jats:sc>it<\/jats:sc>\n            SAD, a DSL for BC. Our work enables bit-level software emulation and automated generation of hierarchical hardware, discusses potential optimizations, and proposes compiler phases to implement those optimizations in a hardware-aware manner. Finally, we introduce population coding, a parallelization scheme for stochastic computing that decreases latency without sacrificing accuracy, and provide theoretical and experimental guarantees on its effectiveness.\n          <\/jats:p>","DOI":"10.1145\/3364999","type":"journal-article","created":{"date-parts":[[2019,11,18]],"date-time":"2019-11-18T13:01:53Z","timestamp":1574082113000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["B\n            <scp>it<\/scp>\n            SAD v2"],"prefix":"10.1145","volume":"16","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7669-5943","authenticated-orcid":false,"given":"Kyle","family":"Daruwalla","sequence":"first","affiliation":[{"name":"University of Wisconsin\u2014Madison, WI, USA"}]},{"given":"Heng","family":"Zhuo","sequence":"additional","affiliation":[{"name":"University of Wisconsin\u2014Madison, WI, USA"}]},{"given":"Rohit","family":"Shukla","sequence":"additional","affiliation":[{"name":"University of Wisconsin\u2014Madison, WI, USA"}]},{"given":"Mikko","family":"Lipasti","sequence":"additional","affiliation":[{"name":"University of Wisconsin\u2014Madison, WI, USA"}]}],"member":"320","published-online":{"date-parts":[[2019,11,18]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_2_2_2_1","DOI":"10.1145\/2465787.2465794"},{"key":"e_1_2_2_3_1","first-page":"45","article-title":"Block power method for SVD decomposition","volume":"23","author":"Bentbib A. H.","year":"2015","journal-title":"Anal. Sti. Univ. Ovid. Const. Ser. Mat."},{"doi-asserted-by":"publisher","key":"e_1_2_2_4_1","DOI":"10.1109\/12.954505"},{"volume-title":"Proceedings of the IEEE Conference on Decision and Control. 3381--3388","author":"Clawson Taylor S.","key":"e_1_2_2_5_1"},{"volume-title":"Proceedings of the 1st ISCA Workshop on Unary Computing.","year":"2019","author":"Daruwalla Kyle","key":"e_1_2_2_6_1"},{"doi-asserted-by":"publisher","key":"e_1_2_2_7_1","DOI":"10.1145\/3316482.3326355"},{"volume-title":"Proceedings of the IEEE International Conference on Intelligent Robots and Systems, 1099--1106","year":"2011","author":"Duhamel Pierre Emile","key":"e_1_2_2_8_1"},{"doi-asserted-by":"publisher","key":"e_1_2_2_9_1","DOI":"10.1145\/3287624.3287706"},{"volume-title":"Wood","year":"2015","author":"Floreano Dario","key":"e_1_2_2_10_1"},{"volume-title":"Advances in Information Systems Science","author":"Gaines B. R.","key":"e_1_2_2_11_1"},{"volume-title":"Gaudet","year":"2019","author":"Gross Warren J.","key":"e_1_2_2_12_1"},{"doi-asserted-by":"publisher","key":"e_1_2_2_13_1","DOI":"10.1080\/01621459.1963.10500830"},{"doi-asserted-by":"publisher","key":"e_1_2_2_14_1","DOI":"10.1145\/2966986.2966988"},{"volume-title":"Proceedings of the 1st Workshop on Pioneering Processor Paradigms.","year":"2017","author":"Lipasti Mikko","key":"e_1_2_2_15_1"},{"doi-asserted-by":"publisher","key":"e_1_2_2_16_1","DOI":"10.1126\/science.1231806"},{"volume-title":"INRIA, inria-00174036v3.","author":"Malis Ezio","first-page":"90","key":"e_1_2_2_17_1"},{"doi-asserted-by":"publisher","key":"e_1_2_2_18_1","DOI":"10.1109\/SiPS.2013.6674504"},{"doi-asserted-by":"publisher","key":"e_1_2_2_19_1","DOI":"10.1145\/3174243.3174267"},{"doi-asserted-by":"publisher","key":"e_1_2_2_20_1","DOI":"10.1109\/IJCNN.2017.7966352"},{"doi-asserted-by":"crossref","unstructured":"Rohit Shukla Soroosh Khoram Erik Jorgensen Jing Li Mikko Lipasti and Stephen Wright. 2018. Computing Generalized Matrix Inverse on Spiking Neural Substrate. 115 pages.  Rohit Shukla Soroosh Khoram Erik Jorgensen Jing Li Mikko Lipasti and Stephen Wright. 2018. Computing Generalized Matrix Inverse on Spiking Neural Substrate. 115 pages.","key":"e_1_2_2_21_1","DOI":"10.3389\/fnins.2018.00115"},{"doi-asserted-by":"publisher","key":"e_1_2_2_22_1","DOI":"10.1109\/DSD.2014.75"},{"doi-asserted-by":"publisher","key":"e_1_2_2_23_1","DOI":"10.1109\/ICCD.2016.7753265"},{"doi-asserted-by":"publisher","key":"e_1_2_2_24_1","DOI":"10.1109\/ASPDAC.2018.8297346"},{"doi-asserted-by":"publisher","key":"e_1_2_2_25_1","DOI":"10.1145\/3316781.3317844"},{"doi-asserted-by":"publisher","key":"e_1_2_2_26_1","DOI":"10.1109\/JSSC.2017.2705170"}],"container-title":["ACM Transactions on Architecture and Code Optimization"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3364999","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3364999","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:54:23Z","timestamp":1750204463000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3364999"}},"subtitle":["Compiler Optimization and Analysis for Bitstream Computing"],"short-title":[],"issued":{"date-parts":[[2019,11,18]]},"references-count":25,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2019,12,31]]}},"alternative-id":["10.1145\/3364999"],"URL":"https:\/\/doi.org\/10.1145\/3364999","relation":{},"ISSN":["1544-3566","1544-3973"],"issn-type":[{"type":"print","value":"1544-3566"},{"type":"electronic","value":"1544-3973"}],"subject":[],"published":{"date-parts":[[2019,11,18]]},"assertion":[{"value":"2019-06-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-09-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-11-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}