{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:27:38Z","timestamp":1750220858741,"version":"3.41.0"},"reference-count":38,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2019,12,18]],"date-time":"2019-12-18T00:00:00Z","timestamp":1576627200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"DOE","award":["Contract DE-SC0014096 and Contract DE-AC05-76RL01830"],"award-info":[{"award-number":["Contract DE-SC0014096 and Contract DE-AC05-76RL01830"]}]},{"name":"U.S. Department of Energy, Office of Science, Office of Advanced Scientific Computing Research","award":["66905"],"award-info":[{"award-number":["66905"]}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["1817073 and 1704715"],"award-info":[{"award-number":["1817073 and 1704715"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2019,12,31]]},"abstract":"<jats:p>We present FailAmp, a novel LLVM program transformation algorithm that makes programs employing structured index calculations more robust against soft errors. Without FailAmp, an offset error can go undetected; with FailAmp, all subsequent offsets are relativized, building on the faulty one. FailAmp can exploit ISAs such as ARM to further reduce overheads. We verify correctness properties of FailAMP using an SMT solver, and present a thorough evaluation using many high-performance computing benchmarks under a fault injection campaign. FailAmp provides full soft-error detection for address calculation while incurring an average overhead of around 5%.<\/jats:p>","DOI":"10.1145\/3369381","type":"journal-article","created":{"date-parts":[[2019,12,20]],"date-time":"2019-12-20T13:33:12Z","timestamp":1576848792000},"page":"1-21","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["FailAmp"],"prefix":"10.1145","volume":"16","author":[{"given":"Ian","family":"Briggs","sequence":"first","affiliation":[{"name":"University of Utah"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8421-4641","authenticated-orcid":false,"given":"Arnab","family":"Das","sequence":"additional","affiliation":[{"name":"University of Utah"}]},{"given":"Mark","family":"Baranowski","sequence":"additional","affiliation":[{"name":"University of Utah"}]},{"given":"Vishal","family":"Sharma","sequence":"additional","affiliation":[{"name":"Microsoft"}]},{"given":"Sriram","family":"Krishnamoorthy","sequence":"additional","affiliation":[{"name":"Pacific Northwest National Laboratory"}]},{"given":"Zvonimir","family":"Rakamari\u0107","sequence":"additional","affiliation":[{"name":"University of Utah"}]},{"given":"Ganesh","family":"Gopalakrishnan","sequence":"additional","affiliation":[{"name":"University of Utah"}]}],"member":"320","published-online":{"date-parts":[[2019,12,18]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/2807591.2807670"},{"volume-title":"International Conference on Compiler Construction (ETAPS CC\u201908)","author":"Bondhugula Uday","key":"e_1_2_1_2_1"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.14529\/jsfi140101"},{"key":"e_1_2_1_4_1","first-page":"1","article-title":"Evaluating and accelerating high-fidelity error injection for HPC. In Proceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC\u201918), Dallas, TX, November 11--16, 2018","volume":"45","author":"Chang Chun-Kai","year":"2018","journal-title":"IEEE \/ ACM"},{"volume-title":"Technical Report LLNL-SR-666073 2963-2984.","year":"2015","author":"Chen S.","key":"e_1_2_1_5_1"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488859"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126960"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2517639"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1137\/18M1196972"},{"volume-title":"January 25-26","year":"2017","author":"Gopalakrishnan Ganesh","key":"e_1_2_1_10_1"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2012.7476502"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126937"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.52"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2018.00047"},{"key":"e_1_2_1_15_1","first-page":"21","article-title":"Intel 64 and IA-32 architectures optimization reference manual","volume":"248966","year":"2016","journal-title":"Order Number"},{"key":"e_1_2_1_16_1","doi-asserted-by":"crossref","unstructured":"Ian Karlin Jeff Keasler and Rob Neely. 2013. LULESH 2.0 Updates and Changes. Technical Report LLNL-TR-641973. https:\/\/computation.llnl.gov\/projects\/co-design\/lulesh.  Ian Karlin Jeff Keasler and Rob Neely. 2013. LULESH 2.0 Updates and Changes. Technical Report LLNL-TR-641973. https:\/\/computation.llnl.gov\/projects\/co-design\/lulesh.","DOI":"10.2172\/1090032"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.5555\/3014904.3014931"},{"volume-title":"LLVM Language Reference Manual. Retrieved","year":"2019","author":"LLVM","key":"e_1_2_1_18_1"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253181"},{"volume-title":"IEEE International Symposium on High Performance Computer Architecture (HPCA\u201916)","year":"2016","author":"Nie B.","key":"e_1_2_1_20_1"},{"volume-title":"The Computer Engineering Handbook: Electrical Engineering Handbook","author":"Oklobdzija Vojin G.","key":"e_1_2_1_21_1"},{"volume-title":"48th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks Workshops (DSN Workshops\u201918)","year":"2018","author":"Park Sunghyun","key":"e_1_2_1_22_1"},{"volume-title":"The Polyhedral Benchmark suite. Retrieved","year":"2019","key":"e_1_2_1_23_1"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-08867-9_7"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2158100"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.523.0275"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2010.5488831"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/HiPC.2016.037"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2016.187"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.2172\/1184174"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2013.6575309"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1177\/1094342014522573"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/CCGrid.2016.33"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/2907294.2907306"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/2594291.2594298"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2014.101"},{"volume-title":"Rugged Embedded Systems: Computing in Harsh Environments","author":"Vega Augusto","key":"e_1_2_1_37_1"},{"key":"e_1_2_1_38_1","first-page":"188","article-title":"ReStore: Symptom-based soft error detection in microprocessors. IEEE Transactions on Dependable and Secure","volume":"3","author":"Wang Nicholas J.","year":"2006","journal-title":"Computing"}],"container-title":["ACM Transactions on Architecture and Code Optimization"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3369381","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3369381","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3369381","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T23:23:30Z","timestamp":1750202610000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3369381"}},"subtitle":["Relativization Transformation for Soft Error Detection in Structured Address Generation"],"short-title":[],"issued":{"date-parts":[[2019,12,18]]},"references-count":38,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2019,12,31]]}},"alternative-id":["10.1145\/3369381"],"URL":"https:\/\/doi.org\/10.1145\/3369381","relation":{},"ISSN":["1544-3566","1544-3973"],"issn-type":[{"type":"print","value":"1544-3566"},{"type":"electronic","value":"1544-3973"}],"subject":[],"published":{"date-parts":[[2019,12,18]]},"assertion":[{"value":"2019-06-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-10-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2019-12-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}