{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T08:47:15Z","timestamp":1777106835083,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":131,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,3,9]],"date-time":"2020-03-09T00:00:00Z","timestamp":1583712000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,3,9]]},"DOI":"10.1145\/3373376.3378450","type":"proceedings-article","created":{"date-parts":[[2020,3,13]],"date-time":"2020-03-13T22:37:01Z","timestamp":1584139021000},"page":"733-750","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":71,"title":["Accelerometer"],"prefix":"10.1145","author":[{"given":"Akshitha","family":"Sriraman","sequence":"first","affiliation":[{"name":"University of Michigan, Ann Arbor, MI, USA"}]},{"given":"Abhishek","family":"Dhanotia","sequence":"additional","affiliation":[{"name":"Facebook, Menlo Park, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2020,3,13]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"[n.d.]. Adopting Microservices at Netfix. htps:\/\/www.nginx.com\/ blog\/microservices-at-netflix-architectural-best-practices\/.  [n.d.]. Adopting Microservices at Netfix. htps:\/\/www.nginx.com\/ blog\/microservices-at-netflix-architectural-best-practices\/."},{"key":"e_1_3_2_1_2_1","unstructured":"[n.d.]. Advanced Encryption Standard (AES). htps:\/\/nvlpubs.nist. gov\/nistpubs\/FIPS\/NIST.FIPS.197.pdf.  [n.d.]. Advanced Encryption Standard (AES). htps:\/\/nvlpubs.nist. gov\/nistpubs\/FIPS\/NIST.FIPS.197.pdf."},{"key":"e_1_3_2_1_3_1","unstructured":"[n.d.]. Allocation optimization with diferent block-sized allocation maps. htps:\/\/patents.google.com\/patent\/US5481702A\/en.  [n.d.]. Allocation optimization with diferent block-sized allocation maps. htps:\/\/patents.google.com\/patent\/US5481702A\/en."},{"key":"e_1_3_2_1_4_1","unstructured":"[n.d.]. AVX. www.wikipedia.org\/wiki\/Advanced_Vector_Extensions.  [n.d.]. AVX. www.wikipedia.org\/wiki\/Advanced_Vector_Extensions."},{"key":"e_1_3_2_1_5_1","unstructured":"[n.d.]. The Biggest Thing Amazon Got Right. www.gigaom.com\/2011\/ 10\/12\/419-the-biggest-thing-amazon-got-right-the-platform\/.  [n.d.]. The Biggest Thing Amazon Got Right. www.gigaom.com\/2011\/ 10\/12\/419-the-biggest-thing-amazon-got-right-the-platform\/."},{"key":"e_1_3_2_1_6_1","unstructured":"[n.d.]. BPFTrace. https:\/\/github.com\/iovisor\/bpftrace.  [n.d.]. BPFTrace. https:\/\/github.com\/iovisor\/bpftrace."},{"key":"e_1_3_2_1_7_1","unstructured":"[n.d.]. Hidden Costs of Memory Allocation. htps:\/\/randomascii. wordpress.com\/2014\/12\/10\/hidden-costs-of-memory-allocation\/.  [n.d.]. Hidden Costs of Memory Allocation. htps:\/\/randomascii. wordpress.com\/2014\/12\/10\/hidden-costs-of-memory-allocation\/."},{"key":"e_1_3_2_1_8_1","unstructured":"[n.d.]. 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Mcrouter. htps:\/\/github.com\/facebook\/mcrouter.  [n.d.]. Mcrouter. htps:\/\/github.com\/facebook\/mcrouter."},{"key":"e_1_3_2_1_12_1","unstructured":"[n.d.]. OpenSSL & SSL\/TLS Toolkit. htps:\/\/www.openssl.org\/.  [n.d.]. OpenSSL & SSL\/TLS Toolkit. htps:\/\/www.openssl.org\/."},{"key":"e_1_3_2_1_13_1","unstructured":"[n.d.]. Scaling Gilt. htps:\/\/www.infoq.com\/presentations\/scale-gilt.  [n.d.]. Scaling Gilt. htps:\/\/www.infoq.com\/presentations\/scale-gilt."},{"key":"e_1_3_2_1_14_1","unstructured":"[n.d.]. Using tracing at Facebook scale. htps:\/\/tracingsummit.org\/w\/ images\/6\/6f\/TracingSummit2014-Tracing-at-Facebook-Scale.pdf.  [n.d.]. Using tracing at Facebook scale. htps:\/\/tracingsummit.org\/w\/ images\/6\/6f\/TracingSummit2014-Tracing-at-Facebook-Scale.pdf."},{"key":"e_1_3_2_1_15_1","unstructured":"[n.d.]. What is Microservices Architecture? htps:\/\/smartbear.com\/ learn\/api-design\/what-are-microservices\/.  [n.d.]. What is Microservices Architecture? htps:\/\/smartbear.com\/ learn\/api-design\/what-are-microservices\/."},{"key":"e_1_3_2_1_16_1","unstructured":"[n.d.]. Zero-copy TCP receive. https:\/\/lwn.net\/Articles\/752188\/.  [n.d.]. Zero-copy TCP receive. https:\/\/lwn.net\/Articles\/752188\/."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"crossref","unstructured":"Keith Adams Jason Evans Bertrand Maher Guilherme Ottoni Andrew Paroski Brett Simmers Edwin Smith and Owen Yamauchi. 2014. The hiphop virtual machine. In Acm Sigplan Notices.  Keith Adams Jason Evans Bertrand Maher Guilherme Ottoni Andrew Paroski Brett Simmers Edwin Smith and Owen Yamauchi. 2014. The hiphop virtual machine. In Acm Sigplan Notices.","DOI":"10.1145\/2660193.2660199"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750385"},{"key":"e_1_3_2_1_19_1","volume-title":"Pritam Damania, Prakash Khemani, Kannan Muthukkaruppan, Karthik Ranganathan, Nicolas Spiegelberg, Liyin Tang, and Madhuwanti Vaidya.","author":"Aiyer Amitanand S","year":"2012"},{"key":"e_1_3_2_1_20_1","volume-title":"LogCA: A High-Level Performance Model for Hardware Accelerators. In International Symposium on Computer Architecture.","author":"Bin Altaf Muhammad Shoaib"},{"key":"e_1_3_2_1_21_1","unstructured":"Jose M Alvarez and Mathieu Salzmann. 2017. Compression-aware training of deep networks. In Advances in Neural Information Processing Systems.  Jose M Alvarez and Mathieu Salzmann. 2017. Compression-aware training of deep networks. In Advances in Neural Information Processing Systems."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"crossref","unstructured":"Thomas E. Anderson. 1990. The performance of spin lock alternatives for shared-money multiprocessors. Parallel and Distributed Systems.  Thomas E. Anderson. 1990. The performance of spin lock alternatives for shared-money multiprocessors. Parallel and Distributed Systems.","DOI":"10.1109\/71.80120"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304049"},{"key":"e_1_3_2_1_24_1","unstructured":"Patroklos Argyroudis and Chariton Karamitas. 2012. Exploiting the jemalloc memory allocator: Owning Firefox's heap. Blackhat USA.  Patroklos Argyroudis and Chariton Karamitas. 2012. Exploiting the jemalloc memory allocator: Owning Firefox's heap. Blackhat USA."},{"key":"e_1_3_2_1_25_1","volume-title":"Memory Hierarchy for Web Search. In International Symposium on High Performance Computer Architecture.","author":"Ayers Grant","year":"2018"},{"key":"e_1_3_2_1_26_1","volume-title":"Exposure to ideologically diverse news & opinion on Facebook. Science","author":"Bakshy Eytan","year":"2015"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"crossref","unstructured":"Mat?j Bart\u00edk Sven Ubik and Pavel Kubalik. 2015. LZ4 compression algorithm on FPGA. In Electronics Circuits and Systems.  Mat?j Bart\u00edk Sven Ubik and Pavel Kubalik. 2015. LZ4 compression algorithm on FPGA. In Electronics Circuits and Systems.","DOI":"10.1109\/ICECS.2015.7440278"},{"key":"e_1_3_2_1_28_1","volume-title":"USENIX Symposium on Operating Systems Design and Implementation.","author":"Belay Adam","year":"2012"},{"key":"e_1_3_2_1_29_1","volume-title":"IX: A Protected Dataplane Operating System for High Throughput and Low Latency. In USENIX Conference on Operating Systems Design and Implementation.","author":"Belay Adam","year":"2014"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"crossref","unstructured":"Emery D Berger Benjamin G Zorn and Kathryn S McKinley. 2002. Reconsidering custom memory allocation. ACM.  Emery D Berger Benjamin G Zorn and Kathryn S McKinley. 2002. Reconsidering custom memory allocation. ACM.","DOI":"10.1145\/582419.582421"},{"key":"e_1_3_2_1_31_1","volume-title":"Network and Distributed System Security Symposium.","author":"Berson Tom","year":"2001"},{"key":"e_1_3_2_1_32_1","unstructured":"Christopher James Blythe Gennaro A Cuomo Erik A Daughtrey and Matt R Hogstrom. 2007. Dynamic thread pool tuning techniques. Google Patents.  Christopher James Blythe Gennaro A Cuomo Erik A Daughtrey and Matt R Hogstrom. 2007. Dynamic thread pool tuning techniques. Google Patents."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/1989323.1989438"},{"key":"e_1_3_2_1_34_1","volume-title":"USENIX Annual Technical Conference.","author":"Bronson Nathan","year":"2013"},{"key":"e_1_3_2_1_35_1","volume-title":"Redis in Action","author":"Carlson Josiah L."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509612"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.36"},{"key":"e_1_3_2_1_38_1","volume-title":"Eunice Santos, Ramesh Subramonian, and Thorsten Von Eicken.","author":"Culler David","year":"1993"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1155\/2013\/428078"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"crossref","unstructured":"Mayank Daga Ashwin M Aji and Wu-chun Feng. 2011. On the efcacy of a fused CPU+ GPU processor (or APU) for parallel computing. In Application Accelerators in High-Performance Computing.  Mayank Daga Ashwin M Aji and Wu-chun Feng. 2011. On the efcacy of a fused CPU+ GPU processor (or APU) for parallel computing. In Application Accelerators in High-Performance Computing.","DOI":"10.1109\/SAAHPC.2011.29"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"crossref","unstructured":"Yaozu Dong Xiaowei Yang Jianhui Li Guangdeng Liao Kun Tian and Haibing Guan. 2012. High performance network virtualization with SR-IOV. J. Parallel and Distrib. Comput. (2012).  Yaozu Dong Xiaowei Yang Jianhui Li Guangdeng Liao Kun Tian and Haibing Guan. 2012. High performance network virtualization with SR-IOV. J. Parallel and Distrib. Comput. (2012).","DOI":"10.1016\/j.jpdc.2012.01.020"},{"key":"e_1_3_2_1_42_1","volume-title":"Julius Mandelblat, Anirudha Rahatekar, Lihu Rappoport, Efraim Rotem, Ahmad Yasin, and Adi Yoaz.","author":"Doweck Jack","year":"2017"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"crossref","unstructured":"Jose Duato Antonio J Pena Federico Silla Rafael Mayo and Enrique S Quintana-Orti. 2011. Performance of CUDA virtualized remote GPUs in high performance clusters. In Parallel Processing.  Jose Duato Antonio J Pena Federico Silla Rafael Mayo and Enrique S Quintana-Orti. 2011. Performance of CUDA virtualized remote GPUs in high performance clusters. In Parallel Processing.","DOI":"10.1109\/ICPP.2011.58"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/3232755.3232767"},{"key":"e_1_3_2_1_45_1","volume-title":"Dark Silicon & the End of Multicore Scaling. In International Symposium on Computer Architecture.","author":"Esmaeilzadeh Hadi","year":"2011"},{"key":"e_1_3_2_1_46_1","unstructured":"Brad Fitzpatrick. 2004. Distributed Caching with Memcached. Linux.  Brad Fitzpatrick. 2004. Distributed Caching with Memcached. Linux."},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"crossref","unstructured":"Jeremy Fowers Joo-Young Kim Doug Burger and Scott Hauck. 2015. A scalable high-bandwidth architecture for lossless compression on fpgas. In Field-Programmable Custom Computing Machines.  Jeremy Fowers Joo-Young Kim Doug Burger and Scott Hauck. 2015. A scalable high-bandwidth architecture for lossless compression on fpgas. In Field-Programmable Custom Computing Machines.","DOI":"10.1109\/FCCM.2015.46"},{"key":"e_1_3_2_1_48_1","unstructured":"PhilipWerner Frey and Gustavo Alonso. 2009. Minimizing the Hidden Cost of RDMA. In Distributed Computing Systems.  PhilipWerner Frey and Gustavo Alonso. 2009. Minimizing the Hidden Cost of RDMA. In Distributed Computing Systems."},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783747"},{"key":"e_1_3_2_1_50_1","volume-title":"Yuxiong He, Sameh Elnikety, Ricardo Bianchini, and Kathryn McKinley.","author":"Haque Md","year":"2015"},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00059"},{"key":"e_1_3_2_1_52_1","unstructured":"Xinran He Junfeng Pan Ou Jin Tianbing Xu Bo Liu Tao Xu Yanxin Shi Antoine Atallah Ralf Herbrich Stuart Bowers and Joaquin Qui\u00f1onero Candela. 2014. Practical Lessons from Predicting Clicks on Ads at Facebook. In Data Mining for Online Advertising.  Xinran He Junfeng Pan Ou Jin Tianbing Xu Bo Liu Tao Xu Yanxin Shi Antoine Atallah Ralf Herbrich Stuart Bowers and Joaquin Qui\u00f1onero Candela. 2014. Practical Lessons from Predicting Clicks on Ads at Facebook. In Data Mining for Online Advertising."},{"key":"e_1_3_2_1_53_1","volume-title":"Workshop on Modeling, Benchmarking, and Simulations.","author":"Hempstead Mark","year":"2009"},{"key":"e_1_3_2_1_54_1","volume-title":"SPEC CPU2006 Benchmark Descriptions. SIGARCH Comp. Arch. News","author":"Henning John L.","year":"2006"},{"key":"e_1_3_2_1_55_1","volume-title":"Gables: A Roofine Model for Mobile SoCs. In High Performance Computer Architecture.","author":"Hill Mark","year":"2019"},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"crossref","unstructured":"Sunpyo Hong and Hyesoon Kim. 2009. An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. In SIGARCH Computer Architecture News.  Sunpyo Hong and Hyesoon Kim. 2009. An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. In SIGARCH Computer Architecture News.","DOI":"10.1145\/1555754.1555775"},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"crossref","unstructured":"Sunpyo Hong and Hyesoon Kim. 2010. An integrated GPU power and performance model. In SIGARCH Computer Architecture News.  Sunpyo Hong and Hyesoon Kim. 2010. An integrated GPU power and performance model. In SIGARCH Computer Architecture News.","DOI":"10.1145\/1815961.1815998"},{"key":"e_1_3_2_1_58_1","volume-title":"LAMA: Optimized Locality-aware Memory Allocation for Key-value Cache. In USENIX-Annual Technical Conference.","author":"Hu Xiameng","year":"2015"},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/2600428.2609572"},{"key":"e_1_3_2_1_60_1","volume-title":"USENIX Conference on Networked Systems Design and Implementation.","author":"Jeong Eun Young","year":"2014"},{"key":"e_1_3_2_1_61_1","volume-title":"European Conference on Parallel Processing.","author":"Jia Haipeng","year":"2012"},{"key":"e_1_3_2_1_62_1","volume-title":"International Symposium on Computer Architecture.","author":"Jouppi Norman"},{"key":"e_1_3_2_1_63_1","volume-title":"International Symposium on Computer Architecture.","author":"Kanev Svilen","year":"2015"},{"key":"e_1_3_2_1_64_1","volume-title":"Int. Symposium on Workload Characterization.","author":"Kanev Svilen","year":"2014"},{"key":"e_1_3_2_1_65_1","volume-title":"Gu-Yeon Wei, and David Brooks.","author":"Kanev Svilen","year":"2017"},{"key":"e_1_3_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1145\/2391229.2391238"},{"key":"e_1_3_2_1_67_1","volume-title":"International Symposium on Microarchitecture.","author":"Suleman M. Aater"},{"key":"e_1_3_2_1_68_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.37"},{"key":"e_1_3_2_1_69_1","volume-title":"Delayed-Dynamic-Selective (DDS) Prediction for Reducing Extreme Tail Latency in Web Search. In ACM International Conference on Web Search and Data Mining.","author":"Kim Saehoon","year":"2015"},{"key":"e_1_3_2_1_70_1","unstructured":"Taewhan Kim and Jungeun Kim. 2006. Integration of code scheduling memory allocation and array binding for memory-access optimization. Computer-Aided Design of Integrated Circuits and Systems.  Taewhan Kim and Jungeun Kim. 2006. Integration of code scheduling memory allocation and array binding for memory-access optimization. Computer-Aided Design of Integrated Circuits and Systems."},{"key":"e_1_3_2_1_71_1","volume-title":"Jr.","author":"Knobe Kathleen","year":"1990"},{"key":"e_1_3_2_1_72_1","unstructured":"Monica S Lam. 2012. A systolic array optimizing compiler.  Monica S Lam. 2012. A systolic array optimizing compiler."},{"key":"e_1_3_2_1_73_1","article-title":"An FPGA-based in-line accelerator for memcached","author":"Lavasani Maysam","year":"2013","journal-title":"Comp. Arch. Letters."},{"key":"e_1_3_2_1_74_1","unstructured":"Doug Lea andWolfram Gloger. 1996. A memory allocator. Unix\/mail.  Doug Lea andWolfram Gloger. 1996. A memory allocator. Unix\/mail."},{"key":"e_1_3_2_1_75_1","unstructured":"Timothy R Learmont. 2001. Fine-grained consistency mechanism for optimistic concurrency control using lock groups. Google Patents.  Timothy R Learmont. 2001. Fine-grained consistency mechanism for optimistic concurrency control using lock groups. Google Patents."},{"key":"e_1_3_2_1_76_1","doi-asserted-by":"publisher","DOI":"10.1145\/1281700.1281702"},{"key":"e_1_3_2_1_77_1","volume-title":"MICA: A Holistic Approach to Fast In-memory Key-value Storage. In Networked Systems Design and Implementation.","author":"Lim Hyeontaek","year":"2014"},{"key":"e_1_3_2_1_78_1","doi-asserted-by":"crossref","unstructured":"Ming Liu Liang Luo Jacob Nelson Luis Ceze Arvind Krishnamurthy and Kishore Atreya. 2017. IncBricks: Toward In-Network Computation with an In-Network Cache. In Architectural Support for Programming Languages and Operating Systems.  Ming Liu Liang Luo Jacob Nelson Luis Ceze Arvind Krishnamurthy and Kishore Atreya. 2017. IncBricks: Toward In-Network Computation with an In-Network Cache. In Architectural Support for Programming Languages and Operating Systems.","DOI":"10.1145\/3037697.3037731"},{"key":"e_1_3_2_1_79_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2749475"},{"key":"e_1_3_2_1_80_1","volume-title":"A survey of performance modeling and simulation techniques for accelerator-based computing. Parallel and Distributed Systems","author":"Lopez-Novoa Unai","year":"2014"},{"key":"e_1_3_2_1_81_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446070"},{"key":"e_1_3_2_1_82_1","unstructured":"Howard Mao Randy H Katz and Krste Asanovic. 2017. Hardware Acceleration for Memory to Memory Copies. (2017).  Howard Mao Randy H Katz and Krste Asanovic. 2017. Hardware Acceleration for Memory to Memory Copies. (2017)."},{"key":"e_1_3_2_1_84_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485975"},{"key":"e_1_3_2_1_85_1","volume-title":"Heterogeneity in \"homogeneous\" warehouse-scale computers: A performance opportunity","author":"Mars Jason","year":"2011"},{"key":"e_1_3_2_1_86_1","volume-title":"Modeling and predicting performance of high performance computing applications on hardware accelerators. High Performance Computing Applications","author":"Meswani Mitesh R","year":"2013"},{"key":"e_1_3_2_1_87_1","doi-asserted-by":"crossref","unstructured":"Maged M. Michael. 2004. Scalable Lock-free Dynamic Memory Allocation. In Programming Language Design and Implementation.  Maged M. Michael. 2004. Scalable Lock-free Dynamic Memory Allocation. In Programming Language Design and Implementation.","DOI":"10.1145\/996841.996848"},{"key":"e_1_3_2_1_88_1","volume-title":"Enhancing Server Efciency in the Face of Killer Microseconds. In International Symposium on High Performance Computer Architecture.","author":"Mirhosseini Amirhossein"},{"key":"e_1_3_2_1_89_1","volume-title":"Hiding the Microsecond-Scale Latency of Storage-Class Memories with Duplexity. In Annual Non-Volative Memories Workshop.","author":"Mirhosseini Amirhossein"},{"key":"e_1_3_2_1_90_1","unstructured":"Irakli Nadareishvili Ronnie Mitra Matt McLarty and Mike Amundsen. 2016. Microservice Arch.: Aligning Principles Practices & Culture.  Irakli Nadareishvili Ronnie Mitra Matt McLarty and Mike Amundsen. 2016. Microservice Arch.: Aligning Principles Practices & Culture."},{"key":"e_1_3_2_1_91_1","volume-title":"Yury Audzevich, Sergio L\u00f3pez-Buedo, and Andrew W Moore.","author":"Neugebauer Rolf","year":"2018"},{"key":"e_1_3_2_1_92_1","volume-title":"ARMCI: A portable aggregate remote memory copy interface. Citeseer.","author":"Nieplocha Jarek","year":"2000"},{"key":"e_1_3_2_1_93_1","volume-title":"Metrics for early-stage modeling of many-accelerator architectures","author":"Nilakantan Siddharth","year":"2012"},{"key":"e_1_3_2_1_94_1","volume-title":"Conference on Computing Frontiers.","author":"Cedric Nugteren and Henk Corp","year":"2012"},{"key":"e_1_3_2_1_95_1","volume-title":"HHVM JIT: A Profle-guided, Region-based Compiler for PHP & Hack. In Programming Language Design and Implementation.","author":"Ottoni Guilherme","year":"2018"},{"key":"e_1_3_2_1_96_1","doi-asserted-by":"publisher","DOI":"10.14778\/2824032.2824078"},{"key":"e_1_3_2_1_97_1","volume-title":"DougWoos, Arvind Krishnamurthy, Thomas Anderson, and Timothy Roscoe.","author":"Peter Simon","year":"2016"},{"key":"e_1_3_2_1_98_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132747.3132780"},{"key":"e_1_3_2_1_99_1","doi-asserted-by":"crossref","unstructured":"Sarunya Pumma Min Si Wu-chun Feng and Pavan Balaji. 2017. Towards scalable deep learning via I\/O analysis and optimization. In High Performance Computing and Communications.  Sarunya Pumma Min Si Wu-chun Feng and Pavan Balaji. 2017. Towards scalable deep learning via I\/O analysis and optimization. In High Performance Computing and Communications.","DOI":"10.1109\/HPCC-SmartCity-DSS.2017.29"},{"key":"e_1_3_2_1_100_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2011.6114208"},{"key":"e_1_3_2_1_101_1","doi-asserted-by":"publisher","DOI":"10.1145\/2702123.2702174"},{"key":"e_1_3_2_1_102_1","doi-asserted-by":"publisher","DOI":"10.1145\/2619239.2626310"},{"key":"e_1_3_2_1_103_1","doi-asserted-by":"publisher","DOI":"10.1145\/1621960.1621962"},{"key":"e_1_3_2_1_104_1","unstructured":"David Vincent Schuehler. [n.d.]. Techniques for processing TCP\/IP fow content in network switches at gigabit line rates. Semantic Scholar.  David Vincent Schuehler. [n.d.]. Techniques for processing TCP\/IP fow content in network switches at gigabit line rates. Semantic Scholar."},{"key":"e_1_3_2_1_105_1","doi-asserted-by":"crossref","volume-title":"RowClone: Fast and Energy-efcient in-DRAM Bulk Data Copy and Initialization. In International Symposium on Microarchitecture.","author":"Seshadri Vivek","DOI":"10.1145\/2540708.2540725"},{"key":"e_1_3_2_1_106_1","volume-title":"UKSIM European Symposium on Computer Modeling and Simulation.","author":"Simek Vaclav","year":"2008"},{"key":"e_1_3_2_1_107_1","doi-asserted-by":"crossref","unstructured":"Evangelia Sitaridi Orestis Polychroniou and Kenneth A Ross. 2016. SIMD-accelerated regular expression matching. In InternationalWorkshop on Data Management on New Hardware.  Evangelia Sitaridi Orestis Polychroniou and Kenneth A Ross. 2016. SIMD-accelerated regular expression matching. In InternationalWorkshop on Data Management on New Hardware.","DOI":"10.1145\/2933349.2933357"},{"key":"e_1_3_2_1_108_1","doi-asserted-by":"publisher","DOI":"10.1145\/1090191.1080114"},{"key":"e_1_3_2_1_109_1","volume-title":"International Symposium on Parallel and Distributed Processing.","author":"Song Shuaiwen","year":"2013"},{"key":"e_1_3_2_1_110_1","unstructured":"Akshitha Sriraman. 2019. Unfair Data Centers for Fun and Proft. In Wild and Crazy Ideas (ASPLOS).  Akshitha Sriraman. 2019. Unfair Data Centers for Fun and Proft. In Wild and Crazy Ideas (ASPLOS)."},{"key":"e_1_3_2_1_111_1","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322227"},{"key":"e_1_3_2_1_112_1","volume-title":"The Annual Workshop on Duplicating, Deconstructing, and Debunking","author":"Sriraman Akshitha","year":"2016"},{"key":"e_1_3_2_1_113_1","volume-title":"IEEE International Symposium on Workload Characterization.","author":"Sriraman Akshitha"},{"key":"e_1_3_2_1_114_1","volume-title":"Proceedings of the 12th USENIX conference on Operating Systems Design and Implementation.","author":"Sriraman Akshitha","year":"2018"},{"key":"e_1_3_2_1_115_1","volume-title":"Performance-Efcient Notifcation Paradigms for Disaggregated OLDI Microservices. In Workshop on Resource Disaggregation.","author":"Sriraman Akshitha"},{"key":"e_1_3_2_1_116_1","volume-title":"Linux Conference.","author":"Starovoitov Alexei","year":"2015"},{"key":"e_1_3_2_1_117_1","volume-title":"CAPI: A coherent accelerator processor interface. IBM Journal R&D.","author":"Stuecheli Jefrey","year":"2015"},{"key":"e_1_3_2_1_118_1","doi-asserted-by":"publisher","DOI":"10.1109\/INFOCOM.2006.329"},{"key":"e_1_3_2_1_119_1","volume-title":"Patt","author":"Suleman M. Aater","year":"2008"},{"key":"e_1_3_2_1_120_1","volume-title":"Design Automation Conference.","author":"Taylor Michael B","year":"2012"},{"key":"e_1_3_2_1_121_1","doi-asserted-by":"crossref","unstructured":"Xinmin Tian Hideki Saito Serguei V Preis Eric N Garcia Sergey S Kozhukhov Matt Masten Aleksei G Cherkasov and Nikolay Panchenko. 2013. Practical simd vectorization techniques for intel\u00ae xeon phi coprocessors. In Parallel & Distributed Processing.  Xinmin Tian Hideki Saito Serguei V Preis Eric N Garcia Sergey S Kozhukhov Matt Masten Aleksei G Cherkasov and Nikolay Panchenko. 2013. Practical simd vectorization techniques for intel\u00ae xeon phi coprocessors. In Parallel & Distributed Processing.","DOI":"10.1109\/IPDPSW.2013.245"},{"key":"e_1_3_2_1_122_1","volume-title":"Workshop on Experimental computer science.","author":"Tsafrir Dan","year":"2007"},{"key":"e_1_3_2_1_123_1","volume-title":"Prasad Chakka, Peter Dimov, Hui Ding, Jack Ferris, Anthony Giardullo, and Jeremy Hoon.","author":"Venkataramani Venkateshwaran","year":"2012"},{"key":"e_1_3_2_1_124_1","doi-asserted-by":"publisher","DOI":"10.1109\/ColumbianCC.2015.7333476"},{"key":"e_1_3_2_1_125_1","volume-title":"Asynchronous Invocations. In International Conference on Distributed Computing Systems.","author":"Wang Qingyang","year":"2017"},{"key":"e_1_3_2_1_126_1","volume-title":"ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming.","author":"Wang Zheng"},{"key":"e_1_3_2_1_127_1","volume-title":"Choudhury","author":"Wu Carole-Jean","year":"2019"},{"key":"e_1_3_2_1_128_1","unstructured":"Owen Yamauchi. 2015. Hack and HHVM: programming productivity without breaking things.  Owen Yamauchi. 2015. Hack and HHVM: programming productivity without breaking things."},{"key":"e_1_3_2_1_129_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001186"},{"key":"e_1_3_2_1_130_1","doi-asserted-by":"crossref","unstructured":"Yao Zhang and John D Owens. 2011. A quantitative perf. analysis model for GPU architectures. In High Perf. Computer Architecture.  Yao Zhang and John D Owens. 2011. A quantitative perf. analysis model for GPU architectures. In High Perf. Computer Architecture.","DOI":"10.1109\/HPCA.2011.5749745"},{"key":"e_1_3_2_1_131_1","volume-title":"Dynamic Memory Optimization Using Pool Allocation and Prefetching. SIGARCH Comput. Archit. News","author":"Zhao Qin","year":"2005"},{"key":"e_1_3_2_1_132_1","unstructured":"Mark Zuckerberg Ruchi Sanghvi Andrew Bosworth Chris Cox Aaron Sittig Chris Hughes Katie Geminder and Dan Corson. 2010. Dynamically providing a news feed about a user of a social network. Google Patents.  Mark Zuckerberg Ruchi Sanghvi Andrew Bosworth Chris Cox Aaron Sittig Chris Hughes Katie Geminder and Dan Corson. 2010. Dynamically providing a news feed about a user of a social network. Google Patents."}],"event":{"name":"ASPLOS '20: Architectural Support for Programming Languages and Operating Systems","location":"Lausanne Switzerland","acronym":"ASPLOS '20","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3373376.3378450","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3373376.3378450","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:32:59Z","timestamp":1750199579000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3373376.3378450"}},"subtitle":["Understanding Acceleration Opportunities for Data Center Overheads at Hyperscale"],"short-title":[],"issued":{"date-parts":[[2020,3,9]]},"references-count":131,"alternative-id":["10.1145\/3373376.3378450","10.1145\/3373376"],"URL":"https:\/\/doi.org\/10.1145\/3373376.3378450","relation":{},"subject":[],"published":{"date-parts":[[2020,3,9]]},"assertion":[{"value":"2020-03-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}