{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:49:37Z","timestamp":1774367377813,"version":"3.50.1"},"reference-count":51,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2020,5,22]],"date-time":"2020-05-22T00:00:00Z","timestamp":1590105600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"MeitY Government of India for supporting the research work carried out"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2020,7,31]]},"abstract":"<jats:p>With extreme miniaturization of traditional CMOS devices in deep sub-micron design levels, the delay of a circuit, as well as power dissipation and area are dominated by interconnections between logic blocks. Interconnect today is causing major problems such as delay, power dissipation, and so on. In an attempt to search for alternative materials, Graphene nanoribbons have been found to be potential for both transistors and interconnects due to its outstanding electrical and thermal properties. Graphene nanoribbons provide better options as materials used for global routing trees in VLSI circuits. However, certain special characteristics of Graphene nanoribbon prohibit direct application of existing VLSI routing tree construction methods. In this article, we address this issue and propose heuristic methods for construction of Graphene nanoribbon--based minimum hybrid cost and minimum-delay Steiner trees. We compute the delays for the trees using Elmore delay approximation. Experimental results demonstrate the effectiveness of our proposed methods, which are quite encouraging.<\/jats:p>","DOI":"10.1145\/3384214","type":"journal-article","created":{"date-parts":[[2020,5,25]],"date-time":"2020-05-25T22:08:15Z","timestamp":1590444495000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["A Global Routing Method for Graphene Nanoribbons Based Circuits and Interconnects"],"prefix":"10.1145","volume":"16","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4416-8326","authenticated-orcid":false,"given":"Subrata","family":"Das","sequence":"first","affiliation":[{"name":"Department of Information Technology, Academy of Technology, Hooghly, Kolkata, WB, India"}]},{"given":"Debesh Kumar","family":"Das","sequence":"additional","affiliation":[{"name":"Department of Computer Science 8 Engineering, Jadavpur University, Kolkata, India"}]},{"given":"Soumya","family":"Pandit","sequence":"additional","affiliation":[{"name":"Institute of Radio Physics 8 Electronics, University of Calcutta, Kolkata, WB, India"}]}],"member":"320","published-online":{"date-parts":[[2020,5,22]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl062132h"},{"key":"e_1_2_1_2_1","volume-title":"Nanoscience and Technology: A Collection of Reviews from Nature Journals. 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Electronic confinement and coherence in patterned epitaxial graphene. Science 312 5777 (2006) 1191--1196.","DOI":"10.1126\/science.1125925"},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of the IEEE International Conference on Computer Design (ICCD\u201993)","author":"Boese K. D.","unstructured":"K. D. Boese , A. B. Kahng , B. A. McCoy , and G. Robins . 1993. Fidelity and near-optimality of Elmore-based routing constructions . In Proceedings of the IEEE International Conference on Computer Design (ICCD\u201993) . 81--84. K. D. Boese, A. B. Kahng, B. A. McCoy, and G. Robins. 1993. Fidelity and near-optimality of Elmore-based routing constructions. In Proceedings of the IEEE International Conference on Computer Design (ICCD\u201993). 81--84."},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of the 31st ACM\/IEEE Design Automation Conference (DAC\u201994)","author":"Boese K. D.","unstructured":"K. D. Boese , A. B. Kahng , B. A. McCoy , and G. Robins . 1994. Rectilnear Steiner trees with minimum elmore delay . In Proceedings of the 31st ACM\/IEEE Design Automation Conference (DAC\u201994) . 381--386. K. D. Boese, A. B. Kahng, B. A. McCoy, and G. Robins. 1994. Rectilnear Steiner trees with minimum elmore delay. In Proceedings of the 31st ACM\/IEEE Design Automation Conference (DAC\u201994). 381--386."},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.476573"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629286"},{"key":"#cr-split#-e_1_2_1_8_1.1","doi-asserted-by":"crossref","unstructured":"M. Corso E. Carbonell-Sanrom'a and D. G. de Oteyza. 2018. Bottom-Up Fabrication of Atomatically Precise Graphene Nanoribbon. DOI:https:\/\/doi.org\/10.1007\/978-3-319-75810-7_6 10.1007\/978-3-319-75810-7_6","DOI":"10.1007\/978-3-319-75810-7_6"},{"key":"#cr-split#-e_1_2_1_8_1.2","doi-asserted-by":"crossref","unstructured":"M. Corso E. Carbonell-Sanrom'a and D. G. de Oteyza. 2018. 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A technique to construct global routing trees for graphene nanoribbon (GNR). In Proceedings of the International Symposium on Quality Electronic Design (ISQED\u201917). 111--118."},{"key":"e_1_2_1_11_1","volume-title":"Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI\u201916)","author":"Das S.","unstructured":"S. Das , S. Das , A. Majumder , P. Dasgupta , and D. K. Das . 2016. Delay estimates for graphene nanoribbons: A novel measure of fidelity and experiments with global routing trees . In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI\u201916) . 263--268. S. Das, S. Das, A. Majumder, P. Dasgupta, and D. K. Das. 2016. Delay estimates for graphene nanoribbons: A novel measure of fidelity and experiments with global routing trees. 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Device Lett. 31 , 3 (Mar. 2010), 237--239. Y. Yang and R. Murali. 2010. Impact of size effect on graphene nanoribbon transport. IEEE Electron. Device Lett. 31, 3 (Mar. 2010), 237--239.","journal-title":"IEEE Electron. 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