{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,2]],"date-time":"2026-04-02T18:37:27Z","timestamp":1775155047550,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":26,"publisher":"ACM","license":[{"start":{"date-parts":[[2020,9,7]],"date-time":"2020-09-07T00:00:00Z","timestamp":1599436800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100003836","name":"IC Design Education Center","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003836","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100014188","name":"Ministry of Science and ICT, South Korea","doi-asserted-by":"publisher","award":["2020-0-01336"],"award-info":[{"award-number":["2020-0-01336"]}],"id":[{"id":"10.13039\/501100014188","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["2016M3A7B4909668, 2017R1D1A1B03033591, 2020R1A2C2015066,"],"award-info":[{"award-number":["2016M3A7B4909668, 2017R1D1A1B03033591, 2020R1A2C2015066,"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002613","name":"Ulsan National Institute of Science and Technology","doi-asserted-by":"publisher","award":["1.170067.01"],"award-info":[{"award-number":["1.170067.01"]}],"id":[{"id":"10.13039\/501100002613","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2020,9,7]]},"DOI":"10.1145\/3386263.3406954","type":"proceedings-article","created":{"date-parts":[[2020,9,4]],"date-time":"2020-09-04T21:34:23Z","timestamp":1599255263000},"page":"427-432","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network Processor"],"prefix":"10.1145","author":[{"given":"Segi","family":"Lee","sequence":"first","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, South Korea"}]},{"given":"Sugil","family":"Lee","sequence":"additional","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, South Korea"}]},{"given":"Jongeun","family":"Lee","sequence":"additional","affiliation":[{"name":"Ulsan National Institute of Science and Technology, Ulsan, South Korea"}]},{"given":"Jong-Moon","family":"Choi","sequence":"additional","affiliation":[{"name":"Sungkyunkwan University, Suwon, South Korea"}]},{"given":"Do-Wan","family":"Kwon","sequence":"additional","affiliation":[{"name":"Sungkyunkwan University, Suwon, South Korea"}]},{"given":"Seung-Kwang","family":"Hong","sequence":"additional","affiliation":[{"name":"Sungkyunkwan University, Suwon, South Korea"}]},{"given":"Kee-Won","family":"Kwon","sequence":"additional","affiliation":[{"name":"Sungkyunkwan University, Suwon, South Korea"}]}],"member":"320","published-online":{"date-parts":[[2020,9,7]]},"reference":[{"key":"e_1_3_2_2_1_1","volume-title":"Multi-Bit RRAM Transient Modelling and Analysis. In 2018 30th International Conference on Microelectronics (ICM). 232--235","author":"Berikaa E. R.","year":"2018","unstructured":"E. R. Berikaa 2018 . Multi-Bit RRAM Transient Modelling and Analysis. In 2018 30th International Conference on Microelectronics (ICM). 232--235 . E. R. Berikaa et al. 2018. Multi-Bit RRAM Transient Modelling and Analysis. In 2018 30th International Conference on Microelectronics (ICM). 232--235."},{"key":"e_1_3_2_2_2_1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0288-0"},{"key":"e_1_3_2_2_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2749425"},{"key":"e_1_3_2_2_4_1","unstructured":"Zhiyong Cheng etal 2015. Training Binary Multilayer Neural Networks for Image Classification using Expectation Backpropagation. CoRR Vol. abs\/1503.03562 (2015). arxiv: 1503.03562  Zhiyong Cheng et al. 2015. Training Binary Multilayer Neural Networks for Image Classification using Expectation Backpropagation. CoRR Vol. abs\/1503.03562 (2015). arxiv: 1503.03562"},{"key":"e_1_3_2_2_5_1","volume-title":"PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 27--39","author":"Chi P.","year":"2016","unstructured":"P. Chi 2016 . PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 27--39 . P. Chi et al. 2016. PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 27--39."},{"key":"e_1_3_2_2_6_1","volume-title":"BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1. CoRR","year":"2016","unstructured":"Matthieu Courbariaux and Yoshua Bengio. 2016. BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1. CoRR , Vol. abs\/ 1602 .02830 ( 2016 ). arxiv: 1602.02830 Matthieu Courbariaux and Yoshua Bengio. 2016. BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1. CoRR, Vol. abs\/1602.02830 (2016). arxiv: 1602.02830"},{"key":"e_1_3_2_2_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2872455"},{"key":"e_1_3_2_2_8_1","first-page":"1","article-title":"Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations","volume":"18","year":"2017","unstructured":"Itay Hubara 2017 . Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations . J. Mach. Learn. Res. , Vol. 18 , 1 (Jan. 2017), 6869--6898. Itay Hubara et al. 2017. Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations. J. Mach. Learn. Res., Vol. 18, 1 (Jan. 2017), 6869--6898.","journal-title":"J. Mach. Learn. Res."},{"key":"e_1_3_2_2_9_1","volume-title":"Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift. (Feb.","year":"2015","unstructured":"Sergey Ioffe and Christian Szegedy. 2015 . Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift. (Feb. 2015). Sergey Ioffe and Christian Szegedy. 2015. Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift. (Feb. 2015)."},{"key":"e_1_3_2_2_10_1","unstructured":"Alex Krizhevsky. 2012. Learning Multiple Layers of Features from Tiny Images. University of Toronto (May 2012).  Alex Krizhevsky. 2012. Learning Multiple Layers of Features from Tiny Images. University of Toronto (May 2012)."},{"key":"e_1_3_2_2_11_1","volume-title":"Ilya Sutskever and Geoffrey E Hinton","year":"2012","unstructured":"Alex Krizhevsky , Ilya Sutskever and Geoffrey E Hinton . 2012 . ImageNet Classification with Deep Convolutional Neural Networks. In Advances in Neural Information Processing Systems 25. Curran Associates, Inc ., 1097--1105. Alex Krizhevsky, Ilya Sutskever and Geoffrey E Hinton. 2012. ImageNet Classification with Deep Convolutional Neural Networks. In Advances in Neural Information Processing Systems 25. Curran Associates, Inc., 1097--1105."},{"key":"e_1_3_2_2_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"e_1_3_2_2_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2951377"},{"key":"e_1_3_2_2_14_1","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-018-04484-2"},{"key":"e_1_3_2_2_15_1","volume-title":"Bo Zhang and Bin Liu","year":"2016","unstructured":"Fengfu Li , Bo Zhang and Bin Liu . 2016 . Ternary Weight Networks. CoRR , Vol. abs\/ 1605 .04711 (2016). arxiv: 1605.04711 Fengfu Li, Bo Zhang and Bin Liu. 2016. Ternary Weight Networks. CoRR, Vol. abs\/1605.04711 (2016). arxiv: 1605.04711"},{"key":"e_1_3_2_2_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2018.2857494"},{"key":"e_1_3_2_2_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510676"},{"key":"e_1_3_2_2_18_1","doi-asserted-by":"crossref","unstructured":"Bert Moons etal 2018. BinarEye: An Always-On Energy-Accuracy-Scalable Binary CNN Processor With All Memory On Chip in 28nm CMOS. CoRR Vol. abs\/1804.05554 (2018). arxiv: 1804.05554  Bert Moons et al. 2018. BinarEye: An Always-On Energy-Accuracy-Scalable Binary CNN Processor With All Memory On Chip in 28nm CMOS. CoRR Vol. abs\/1804.05554 (2018). arxiv: 1804.05554","DOI":"10.1109\/CICC.2018.8357071"},{"key":"e_1_3_2_2_19_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11263-015-0816-y"},{"key":"e_1_3_2_2_20_1","volume-title":"ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 14--26","author":"Shafiee A.","year":"2016","unstructured":"A. Shafiee 2016 . ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 14--26 . A. Shafiee et al. 2016. ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars. In 2016 ACM\/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 14--26."},{"key":"e_1_3_2_2_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297384"},{"key":"e_1_3_2_2_22_1","volume-title":"2017 22nd Asia and South Pacific Design Automation Conference. 782--787","unstructured":"Tianqi Tang et al. 2017. Binary convolutional neural network on RRAM . In 2017 22nd Asia and South Pacific Design Automation Conference. 782--787 . Tianqi Tang et al. 2017. Binary convolutional neural network on RRAM. In 2017 22nd Asia and South Pacific Design Automation Conference. 782--787."},{"key":"e_1_3_2_2_23_1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0059-3"},{"key":"e_1_3_2_2_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662395"},{"key":"e_1_3_2_2_25_1","volume-title":"2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 98--105","author":"Yonekawa H.","unstructured":"H. Yonekawa and H. Nakahara . 2017. On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA . In 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 98--105 . H. Yonekawa and H. Nakahara. 2017. On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA. In 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 98--105."},{"key":"e_1_3_2_2_26_1","volume-title":"Advanced Electronic Materials","volume":"2","year":"2016","unstructured":"Kyungjean Yoon et al. 2016. Comprehensive Writing Margin Analysis and its Application to Stacked one Diode?One Memory Device for High?Density Crossbar Resistance Switching Random Access Memory . Advanced Electronic Materials , Vol. 2 ( Sep. 2016 ). Kyungjean Yoon et al. 2016. Comprehensive Writing Margin Analysis and its Application to Stacked one Diode?One Memory Device for High?Density Crossbar Resistance Switching Random Access Memory. Advanced Electronic Materials, Vol. 2 (Sep. 2016)."}],"event":{"name":"GLSVLSI '20: Great Lakes Symposium on VLSI 2020","location":"Virtual Event China","acronym":"GLSVLSI '20"},"container-title":["Proceedings of the 2020 on Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3386263.3406954","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3386263.3406954","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:38:25Z","timestamp":1750199905000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3386263.3406954"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9,7]]},"references-count":26,"alternative-id":["10.1145\/3386263.3406954","10.1145\/3386263"],"URL":"https:\/\/doi.org\/10.1145\/3386263.3406954","relation":{},"subject":[],"published":{"date-parts":[[2020,9,7]]},"assertion":[{"value":"2020-09-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}