{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T12:06:57Z","timestamp":1754482017016,"version":"3.41.0"},"reference-count":58,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2020,6,9]],"date-time":"2020-06-09T00:00:00Z","timestamp":1591660800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Proc. ACM Meas. Anal. Comput. Syst."],"published-print":{"date-parts":[[2020,6,9]]},"abstract":"<jats:p>Due to the high density storage demand coming from applications from different domains, 3D NAND flash is becoming a promising candidate to replace 2D NAND flash as the dominant non-volatile memory. However, denser 3D NAND presents various performance and reliability issues, which can be addressed by the 3D NAND specific full-sequence program (FSP) operation. The FSP programs multiple pages simultaneously to mitigate the performance degradation caused by the long latency 3D NAND baseline program operations. However, the FSP-enabled 3D NAND-based SSDs introduce lifetime degradation due to the larger write granularities accessed by the FSP. To address the lifetime issue, in this paper, we propose and experimentally evaluate Centaur, a heterogeneous 2D\/3D NAND heterogeneous SSD, as a solution. Centaur has three main components: a lifetime-aware inter-NAND request dispatcher, a lifetime-aware inter-NAND work stealer, and a data migration strategy from 2D NAND to 3D NAND. We used twelve SSD workloads to compare Centaur against a state-of-the-art 3D NAND-based SSD with the same capacity. Our experimental results indicate that the SSD lifetime and performance are improved by 3.7x and 1.11x, respectively, when using our 2D\/3D heterogeneous SSD.<\/jats:p>","DOI":"10.1145\/3392146","type":"journal-article","created":{"date-parts":[[2020,6,9]],"date-time":"2020-06-09T22:10:12Z","timestamp":1591740612000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Centaur"],"prefix":"10.1145","volume":"4","author":[{"given":"Chun-Yi","family":"Liu","sequence":"first","affiliation":[{"name":"The Pennsylvania State University, State College, PA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jagadish","family":"Kotra","sequence":"additional","affiliation":[{"name":"AMD Research, Austin, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Myoungsoo","family":"Jung","sequence":"additional","affiliation":[{"name":"KAIST, Daejeon, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mahmut Taylan","family":"Kandemir","sequence":"additional","affiliation":[{"name":"The Pennsylvania State University, State College, PA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2020,6,12]]},"reference":[{"key":"e_1_2_1_1_1","series-title":"March 200","volume-title":"https:\/\/www.samsung.com\/.","author":"Samsung","unstructured":"200 . Samsung K9XXG08UXD datasheet. https:\/\/www.samsung.com\/. ( March 200 ) . 200. Samsung K9XXG08UXD datasheet. https:\/\/www.samsung.com\/. (March 200)."},{"volume-title":"Micron MT29F8G08BAA datasheet. https:\/\/www.micron.com\/products\/nand-flash\/. (Feb","year":"2007","key":"e_1_2_1_2_1","unstructured":"2007. Micron MT29F8G08BAA datasheet. https:\/\/www.micron.com\/products\/nand-flash\/. (Feb . 2007 ). 2007. Micron MT29F8G08BAA datasheet. https:\/\/www.micron.com\/products\/nand-flash\/. (Feb. 2007)."},{"key":"e_1_2_1_3_1","volume-title":"http:\/\/www.onfi.org\/. (April","author":"Specification ONFI","year":"2014","unstructured":"2014. ONFI 4.0 Specification . http:\/\/www.onfi.org\/. (April 2014 ). 2014. ONFI 4.0 Specification. http:\/\/www.onfi.org\/. (April 2014)."},{"key":"e_1_2_1_4_1","unstructured":"2016. Samsung 960 EVO SSD. http:\/\/www.samsung.com\/semiconductor\/minisite\/ssd\/product\/consumer\/960evo.html. (Sept. 2016).  2016. Samsung 960 EVO SSD. http:\/\/www.samsung.com\/semiconductor\/minisite\/ssd\/product\/consumer\/960evo.html. (Sept. 2016)."},{"key":"e_1_2_1_5_1","unstructured":"2017. Crucial BX300 SSD. http:\/\/www.crucial.com\/usa\/en\/storage-ssd-bx300. (Aug. 2017).  2017. Crucial BX300 SSD. http:\/\/www.crucial.com\/usa\/en\/storage-ssd-bx300. (Aug. 2017)."},{"volume-title":"Toshiba TR200 3D NAND SSD. https:\/\/www.ocz.com\/us\/ssd\/tr200. (Aug","year":"2017","key":"e_1_2_1_6_1","unstructured":"2017. Toshiba TR200 3D NAND SSD. https:\/\/www.ocz.com\/us\/ssd\/tr200. (Aug . 2017 ). 2017. Toshiba TR200 3D NAND SSD. https:\/\/www.ocz.com\/us\/ssd\/tr200. (Aug. 2017)."},{"volume-title":"Bcache: Linux kernel block layer cache. https:\/\/bcache.evilpiepirate.org\/. (March","year":"2018","key":"e_1_2_1_7_1","unstructured":"2018. Bcache: Linux kernel block layer cache. https:\/\/bcache.evilpiepirate.org\/. (March 2018 ). 2018. Bcache: Linux kernel block layer cache. https:\/\/bcache.evilpiepirate.org\/. (March 2018)."},{"key":"e_1_2_1_8_1","unstructured":"2018. Berkeley DB. https:\/\/www.oracle.com\/database\/berkeley-db\/db.html. (2018).  2018. Berkeley DB. https:\/\/www.oracle.com\/database\/berkeley-db\/db.html. (2018)."},{"key":"e_1_2_1_9_1","unstructured":"2018. btrfs file-system. https:\/\/btrfs.wiki.kernel.org\/index.php\/Main_Page. (2018).  2018. btrfs file-system. https:\/\/btrfs.wiki.kernel.org\/index.php\/Main_Page. (2018)."},{"volume-title":"dm-cache: a Linux kernel's device mapper target that allows creation of hybrid volumes. https:\/\/en.wikipedia. org\/wiki\/Dm-cache. (Oct","year":"2018","key":"e_1_2_1_10_1","unstructured":"2018. dm-cache: a Linux kernel's device mapper target that allows creation of hybrid volumes. https:\/\/en.wikipedia. org\/wiki\/Dm-cache. (Oct . 2018 ). 2018. dm-cache: a Linux kernel's device mapper target that allows creation of hybrid volumes. https:\/\/en.wikipedia. org\/wiki\/Dm-cache. (Oct. 2018)."},{"key":"e_1_2_1_11_1","unstructured":"2018. ext4 file-system. https:\/\/en.wikipedia.org\/wiki\/Ext4. (2018).  2018. ext4 file-system. https:\/\/en.wikipedia.org\/wiki\/Ext4. (2018)."},{"volume-title":"flashcache: a disk cache component for the Linux kernel. https:\/\/en.wikipedia.org\/wiki\/Flashcache. (Oct","year":"2018","key":"e_1_2_1_12_1","unstructured":"2018. flashcache: a disk cache component for the Linux kernel. https:\/\/en.wikipedia.org\/wiki\/Flashcache. (Oct . 2018 ). 2018. flashcache: a disk cache component for the Linux kernel. https:\/\/en.wikipedia.org\/wiki\/Flashcache. (Oct. 2018)."},{"volume-title":"Apple iPhone. https:\/\/www.apple.com\/iphone\/. (April","year":"2020","key":"e_1_2_1_13_1","unstructured":"2020. Apple iPhone. https:\/\/www.apple.com\/iphone\/. (April 2020 ). 2020. Apple iPhone. https:\/\/www.apple.com\/iphone\/. (April 2020)."},{"key":"e_1_2_1_14_1","doi-asserted-by":"crossref","unstructured":"Jacob Alter Ji Xue Alma Dimnaku and Evgenia Smirni. 2019. SSD Failures in the Field: Symptoms Causes and Prediction Models (SC '19).  Jacob Alter Ji Xue Alma Dimnaku and Evgenia Smirni. 2019. SSD Failures in the Field: Symptoms Causes and Prediction Models (SC '19).","DOI":"10.1145\/3295500.3356172"},{"volume-title":"NAND Flash Memory Technologies","author":"Aritome Seiichi","key":"e_1_2_1_15_1","unstructured":"Seiichi Aritome . 2015. NAND Flash Memory Technologies . John Wiley & Sons, Inc. Seiichi Aritome. 2015. NAND Flash Memory Technologies. John Wiley & Sons, Inc."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485961"},{"key":"e_1_2_1_17_1","first-page":"404","article-title":"Flash file system. https:\/\/www.google.com\/patents\/US5404485. (April 4 1995)","volume":"5","author":"Ban A.","year":"1995","unstructured":"A. Ban . 1995 . Flash file system. https:\/\/www.google.com\/patents\/US5404485. (April 4 1995) . US Patent 5 , 404 ,485. A. Ban. 1995. Flash file system. https:\/\/www.google.com\/patents\/US5404485. (April 4 1995). US Patent 5,404,485.","journal-title":"US Patent"},{"volume-title":"2017 IEEE International Symposium on High Performance Computer Architecture (HPCA).","author":"Cai Y.","key":"e_1_2_1_18_1","unstructured":"Y. Cai , S. Ghose , Y. Luo , K. Mai , O. Mutlu , and E. F. Haratsch . 2017. Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques . In 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA). Y. Cai, S. Ghose, Y. Luo, K. Mai, O. Mutlu, and E. F. Haratsch. 2017. Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques. In 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508270"},{"volume-title":"Proceedings of the 40th Annual International Symposium on Computer Architecture (ISCA).","author":"Adrian","key":"e_1_2_1_20_1","unstructured":"Adrian M. Caulfield and Steven Swanson. 2013. QuickSAN: A Storage Area Network for Fast, Distributed, Solid State Disks . In Proceedings of the 40th Annual International Symposium on Computer Architecture (ISCA). Adrian M. Caulfield and Steven Swanson. 2013. QuickSAN: A Storage Area Network for Fast, Distributed, Solid State Disks. In Proceedings of the 40th Annual International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007152"},{"key":"e_1_2_1_22_1","article-title":"A Hybrid Approach to NAND-Flash-Based Solid-State Disks","author":"Chang L. P.","year":"2010","unstructured":"L. P. Chang . 2010 . A Hybrid Approach to NAND-Flash-Based Solid-State Disks . IEEE Trans. Comput. L. P. Chang. 2010. A Hybrid Approach to NAND-Flash-Based Solid-State Disks. IEEE Trans. Comput.","journal-title":"IEEE Trans. Comput."},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.134"},{"volume-title":"2010 International Electron Devices Meeting.","author":"Chen Chih-Ping","key":"e_1_2_1_24_1","unstructured":"Chih-Ping Chen , H. T. Lue , Chih-Chang Hsieh , Kuo-Pin Chang , K. Y. Hsieh , and C. Y. Lu . 2010. Study of fast initial charge loss and it's impact on the programmed states Vt distribution of charge-trapping NAND Flash . In 2010 International Electron Devices Meeting. Chih-Ping Chen, H. T. Lue, Chih-Chang Hsieh, Kuo-Pin Chang, K. Y. Hsieh, and C. Y. Lu. 2010. Study of fast initial charge loss and it's impact on the programmed states Vt distribution of charge-trapping NAND Flash. In 2010 International Electron Devices Meeting."},{"volume-title":"Automation Test in Europe Conference Exhibition (DATE).","author":"Chen F.","key":"e_1_2_1_25_1","unstructured":"F. Chen , M. Yang , Y. Chang , and T. Kuo . 2015. PWL: A progressive wear leveling to minimize data migration overheads for NAND flash devices. In 2015 Design , Automation Test in Europe Conference Exhibition (DATE). F. Chen, M. Yang, Y. Chang, and T. Kuo. 2015. PWL: A progressive wear leveling to minimize data migration overheads for NAND flash devices. In 2015 Design, Automation Test in Europe Conference Exhibition (DATE)."},{"volume-title":"Proc. IEEE.","author":"Compagnoni C. Monzio","key":"e_1_2_1_26_1","unstructured":"C. Monzio Compagnoni , A. Goda , A. S. Spinelli , P. Feeley , A. L. Lacaita , and A. Visconti . 2017. Reviewing the Evolution of the NAND Flash Technology . Proc. IEEE. C. Monzio Compagnoni, A. Goda, A. S. Spinelli, P. Feeley, A. L. Lacaita, and A. Visconti. 2017. Reviewing the Evolution of the NAND Flash Technology. Proc. IEEE."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555790"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508271"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1534530.1534544"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995912"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750420"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062960"},{"volume-title":"NonVolatile Memory Technologies with Emphasis on Flash","author":"Brewer Manzur Gill","key":"e_1_2_1_33_1","unstructured":"Manzur Gill Joe E. Brewer . 2007. NonVolatile Memory Technologies with Emphasis on Flash . John Wiley & Sons, Inc. Manzur Gill Joe E. Brewer. 2007. NonVolatile Memory Technologies with Emphasis on Flash. John Wiley & Sons, Inc."},{"key":"e_1_2_1_34_1","doi-asserted-by":"crossref","unstructured":"Dawoon Jung Jeong-UK Kang Heeseung Jo Jin-Soo Kim and Joonwon Lee. 2010. Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme. ACM Transactions on Embedded Computing Systems.  Dawoon Jung Jeong-UK Kang Heeseung Jo Jin-Soo Kim and Joonwon Lee. 2010. Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme. ACM Transactions on Embedded Computing Systems.","DOI":"10.1145\/1721695.1721706"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.5555\/2342806.2342815"},{"volume-title":"2016 IEEE International Solid-State Circuits Conference (ISSCC).","author":"Kang D.","key":"e_1_2_1_36_1","unstructured":"D. Kang , W. Jeong , C. Kim , D. H. Kim , Y. S. Cho , K. T. Kang , J. Ryu , K. M. Kang , S. Lee , W. Kim , H. Lee , J. Yu , N. Choi , D. S. Jang , J. D. Ihm , D. Kim , Y. S. Min , M. S. Kim , A. S. Park , J. I. Son , I. M. Kim , P. Kwak , B. K. Jung , D. S. Lee , H. Kim , H. J. Yang , D. S. Byeon , K. T. Park , K. H. Kyung , and J. H. Choi . 2016. 7.1 256Gb 3b\/cell V-NAND flash memory with 48 stacked WL layers . In 2016 IEEE International Solid-State Circuits Conference (ISSCC). D. Kang, W. Jeong, C. Kim, D. H. Kim, Y. S. Cho, K. T. Kang, J. Ryu, K. M. Kang, S. Lee, W. Kim, H. Lee, J. Yu, N. Choi, D. S. Jang, J. D. Ihm, D. Kim, Y. S. Min, M. S. Kim, A. S. Park, J. I. Son, I. M. Kim, P. Kwak, B. K. Jung, D. S. Lee, H. Kim, H. J. Yang, D. S. Byeon, K. T. Park, K. H. Kyung, and J. H. Choi. 2016. 7.1 256Gb 3b\/cell V-NAND flash memory with 48 stacked WL layers. In 2016 IEEE International Solid-State Circuits Conference (ISSCC)."},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870331"},{"key":"e_1_2_1_38_1","volume-title":"2016 IEEE International Symposium on Workload Characterization (IISWC).","author":"Kwon Miryeong","year":"2017","unstructured":"Miryeong Kwon , Jie Zhang , Gyuyoung Park , Wonil Choi , David Donofrio , John Shalf , Mahmut Kandemir , and Myoungsoo Jung . 2017 . TraceTracker: Hardware\/Software Co-Evaluation for Large-Scale I\/O Workload Reconstruction . In 2016 IEEE International Symposium on Workload Characterization (IISWC). Miryeong Kwon, Jie Zhang, Gyuyoung Park, Wonil Choi, David Donofrio, John Shalf, Mahmut Kandemir, and Myoungsoo Jung. 2017. TraceTracker: Hardware\/Software Co-Evaluation for Large-Scale I\/O Workload Reconstruction. In 2016 IEEE International Symposium on Workload Characterization (IISWC)."},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/1275986.1275990"},{"key":"e_1_2_1_40_1","volume-title":"Nitro: A Capacity- Optimized SSD Cache for Primary Storage. In 2014 USENIX Annual Technical Conference (USENIX ATC 14)","author":"Li Cheng","year":"2014","unstructured":"Cheng Li , Philip Shilane , Fred Douglis , Hyong Shim , Stephen Smaldone , and Grant Wallace . 2014 . Nitro: A Capacity- Optimized SSD Cache for Primary Storage. In 2014 USENIX Annual Technical Conference (USENIX ATC 14) . Cheng Li, Philip Shilane, Fred Douglis, Hyong Shim, Stephen Smaldone, and Grant Wallace. 2014. Nitro: A Capacity- Optimized SSD Cache for Primary Storage. In 2014 USENIX Annual Technical Conference (USENIX ATC 14)."},{"volume-title":"Pattern-based Write Scheduling and Read Balance-oriented Wear-Leveling for Solid State Drivers. In 2019 35th Symposium on Mass Storage Systems and Technologies (MSST).","author":"Li J.","key":"e_1_2_1_41_1","unstructured":"J. Li , X. Xu , X. Peng , and J. Liao . 2019 . Pattern-based Write Scheduling and Read Balance-oriented Wear-Leveling for Solid State Drivers. In 2019 35th Symposium on Mass Storage Systems and Technologies (MSST). J. Li, X. Xu, X. Peng, and J. Liao. 2019. Pattern-based Write Scheduling and Read Balance-oriented Wear-Leveling for Solid State Drivers. In 2019 35th Symposium on Mass Storage Systems and Technologies (MSST)."},{"volume-title":"Proceedings of the ACM SIGMETRICS\/International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS).","author":"Li Yongkun","key":"e_1_2_1_42_1","unstructured":"Yongkun Li , Patrick P.C. Lee , and John C.S. Lui . 2013. Stochastic Modeling of Large-scale Solid-state Storage Systems: Analysis, Design Tradeoffs and Optimization . In Proceedings of the ACM SIGMETRICS\/International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). Yongkun Li, Patrick P.C. Lee, and John C.S. Lui. 2013. Stochastic Modeling of Large-scale Solid-state Storage Systems: Analysis, Design Tradeoffs and Optimization. In Proceedings of the ACM SIGMETRICS\/International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)."},{"key":"e_1_2_1_43_1","volume-title":"16th USENIX Conference on File and Storage Technologies (FAST 18)","author":"Liu Chunyi","year":"2018","unstructured":"Chunyi Liu , Jagadish Kotra , Myoungsoo Jung , and Mahmut Kandemir . 2018 . PEN: Design and Evaluation of Partial- Erase for 3D NAND-Based High Density SSDs . In 16th USENIX Conference on File and Storage Technologies (FAST 18) . Chunyi Liu, Jagadish Kotra, Myoungsoo Jung, and Mahmut Kandemir. 2018. PEN: Design and Evaluation of Partial- Erase for 3D NAND-Based High Density SSDs. In 16th USENIX Conference on File and Storage Technologies (FAST 18)."},{"volume-title":"2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).","author":"Luo Y.","key":"e_1_2_1_44_1","unstructured":"Y. Luo , S. Ghose , Y. Cai , E. F. Haratsch , and O. Mutlu . 2018. HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness . In 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA). Y. Luo, S. Ghose, Y. Cai, E. F. Haratsch, and O. Mutlu. 2018. HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness. In 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)."},{"key":"e_1_2_1_45_1","volume-title":"Double page programming system and method. https: \/\/www.google.tl\/patents\/US20070030732. (Feb. 8","author":"Micheloni Rino","year":"2007","unstructured":"Rino Micheloni , Luca Crippa , and Roberto Ravasio . 2007. Double page programming system and method. https: \/\/www.google.tl\/patents\/US20070030732. (Feb. 8 2007 ). US Patent 20070030732. Rino Micheloni, Luca Crippa, and Roberto Ravasio. 2007. Double page programming system and method. https: \/\/www.google.tl\/patents\/US20070030732. (Feb. 8 2007). US Patent 20070030732."},{"key":"e_1_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2011.5937225"},{"volume-title":"2011 IEEE International Solid-State Circuits Conference (ISSCC).","author":"Park K.","key":"e_1_2_1_47_1","unstructured":"K. Park , O. Kwon , S. Yoon , M. Choi , I. Kim , B. Kim , M. Kim , Y. Choi , S. Shin , Y. Song , J. Park , J. Lee , C. Eun , H. Lee , H. Kim , J. Lee , J. Kim , T. Kweon , H. Yoon , T. Kim , D. Shim , J. Sel , J. Shin , P. Kwak , J. Han , K. Kim , S. Lee , Y. Lim , and T. Jung . 2011. A 7MB\/s 64Gb 3-bit\/cell DDR NAND flash memory in 20nm-node technology . In 2011 IEEE International Solid-State Circuits Conference (ISSCC). K. Park, O. Kwon, S. Yoon, M. Choi, I. Kim, B. Kim, M. Kim, Y. Choi, S. Shin, Y. Song, J. Park, J. Lee, C. Eun, H. Lee, H. Kim, J. Lee, J. Kim, T. Kweon, H. Yoon, T. Kim, D. Shim, J. Sel, J. Shin, P. Kwak, J. Han, K. Kim, S. Lee, Y. Lim, and T. Jung. 2011. A 7MB\/s 64Gb 3-bit\/cell DDR NAND flash memory in 20nm-node technology. In 2011 IEEE International Solid-State Circuits Conference (ISSCC)."},{"volume-title":"Inside NAND Flash Memory","author":"Rino Micheloni Alessia Marelli","key":"e_1_2_1_48_1","unstructured":"Alessia Marelli Rino Micheloni , Luca Crippa . 2010. Inside NAND Flash Memory . Springer Netherlands . Alessia Marelli Rino Micheloni, Luca Crippa. 2010. Inside NAND Flash Memory. Springer Netherlands."},{"key":"e_1_2_1_49_1","volume-title":"Flash Reliability in Production: The Expected and the Unexpected. In 14th USENIX Conference on File and Storage Technologies (FAST 16)","author":"Schroeder Bianca","year":"2016","unstructured":"Bianca Schroeder , Raghav Lagisetty , and Arif Merchant . 2016 . Flash Reliability in Production: The Expected and the Unexpected. In 14th USENIX Conference on File and Storage Technologies (FAST 16) . Bianca Schroeder, Raghav Lagisetty, and Arif Merchant. 2016. Flash Reliability in Production: The Expected and the Unexpected. In 14th USENIX Conference on File and Storage Technologies (FAST 16)."},{"key":"e_1_2_1_50_1","volume-title":"2019 IEEE International Solid- State Circuits Conference - (ISSCC). Proc. ACM Meas. Anal. Comput. Syst.","volume":"4","author":"Shibata N.","year":"2020","unstructured":"N. Shibata , K. Kanda , T. Shimizu , J. Nakai , O. Nagao , N. Kobayashi , M. Miakashi , Y. Nagadomi , T. Nakano , T. Kawabe , T. Shibuya , M. Sako , K. Yanagidaira , T. Hashimoto , H. Date , M. Sato , T. Nakagawa , H. Takamoto , J. Musha , T. Minamoto , M. Uda , D. Nakamura , K. Sakurai , T. Yamashita , J. Zhou , R. Tachibana , T. Takagiwa , T. Sugimoto , M. Ogawa , Y. Ochi , K. Kawaguchi , M. Kojima , T. Ogawa , T. Hashiguchi , R. Fukuda , M. Masuda , K. Kawakami , T. Someya , Y. Kajitani , Y. Matsumoto , N. Morozumi , J. Sato , N. Raghunathan , Y. L. Koh , S. Chen , J. Lee , H. Nasu , H. Sugawara , K. Hosono , T. Hisada , T. Kaneko , and H. Nakamura . 2019. 13.1 A 1.33Tb 4-bit\/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology . In 2019 IEEE International Solid- State Circuits Conference - (ISSCC). Proc. ACM Meas. Anal. Comput. Syst. , Vol. 4 , No. 2, Article 28. Publication date : June 2020 . Centaur: A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage 28:25 N. Shibata, K. Kanda, T. Shimizu, J. Nakai, O. Nagao, N. Kobayashi, M. Miakashi, Y. Nagadomi, T. Nakano, T. Kawabe, T. Shibuya, M. Sako, K. Yanagidaira, T. Hashimoto, H. Date, M. Sato, T. Nakagawa, H. Takamoto, J. Musha, T. Minamoto, M. Uda, D. Nakamura, K. Sakurai, T. Yamashita, J. Zhou, R. Tachibana, T. Takagiwa, T. Sugimoto, M. Ogawa, Y. Ochi, K. Kawaguchi, M. Kojima, T. Ogawa, T. Hashiguchi, R. Fukuda, M. Masuda, K. Kawakami, T. Someya, Y. Kajitani, Y. Matsumoto, N. Morozumi, J. Sato, N. Raghunathan, Y. L. Koh, S. Chen, J. Lee, H. Nasu, H. Sugawara, K. Hosono, T. Hisada, T. Kaneko, and H. Nakamura. 2019. 13.1 A 1.33Tb 4-bit\/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. In 2019 IEEE International Solid- State Circuits Conference - (ISSCC). Proc. ACM Meas. Anal. Comput. Syst., Vol. 4, No. 2, Article 28. Publication date: June 2020. Centaur: A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage 28:25"},{"volume-title":"2012 4th IEEE International Memory Workshop.","author":"Shim K. S.","key":"e_1_2_1_51_1","unstructured":"K. S. Shim , E. S. Choi , S. W. Jung , S. H. Kim , H. S. Yoo , K. S. Jeon , H. S. Joo , J. S. Oh , Y. S. Jang , K. J. Park , S. M. Choi , S. B. Lee , J. D. Koh , K. H. Lee , J. Y. Lee , S. H. Oh , S. H. Pyi , G. S. Cho , S. K. Park , J. W. Kim , S. K. Lee , and S. J. Hong . 2012. Inherent Issues and Challenges of Program Disturbance of 3D NAND Flash Cell . In 2012 4th IEEE International Memory Workshop. K. S. Shim, E. S. Choi, S. W. Jung, S. H. Kim, H. S. Yoo, K. S. Jeon, H. S. Joo, J. S. Oh, Y. S. Jang, K. J. Park, S. M. Choi, S. B. Lee, J. D. Koh, K. H. Lee, J. Y. Lee, S. H. Oh, S. H. Pyi, G. S. Cho, S. K. Park, J. W. Kim, S. K. Lee, and S. J. Hong. 2012. Inherent Issues and Challenges of Program Disturbance of 3D NAND Flash Cell. In 2012 4th IEEE International Memory Workshop."},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417947"},{"key":"e_1_2_1_53_1","volume-title":"Unleashing the Potentials of Dynamism for Page Allocation Strategies in SSDs. In The 2014 ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS).","author":"Tavakkol Arash","year":"2014","unstructured":"Arash Tavakkol , Mohammad Arjomand , and Hamid Sarbazi-Azad . 2014 . Unleashing the Potentials of Dynamism for Page Allocation Strategies in SSDs. In The 2014 ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). Arash Tavakkol, Mohammad Arjomand, and Hamid Sarbazi-Azad. 2014. Unleashing the Potentials of Dynamism for Page Allocation Strategies in SSDs. In The 2014 ACM International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)."},{"key":"e_1_2_1_54_1","doi-asserted-by":"crossref","unstructured":"Arash Tavakkol Pooyan Mehrvarzy Mohammad Arjomand and Hamid Sarbazi-Azad. 2016. Performance Evaluation of Dynamic Page Allocation Strategies in SSDs. ACM Transactions on Modeling and Performance Evaluation of Computing Systems.  Arash Tavakkol Pooyan Mehrvarzy Mohammad Arjomand and Hamid Sarbazi-Azad. 2016. Performance Evaluation of Dynamic Page Allocation Strategies in SSDs. ACM Transactions on Modeling and Performance Evaluation of Computing Systems.","DOI":"10.1145\/2829974"},{"key":"e_1_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1145\/2465529.2465543"},{"volume-title":"2017 IEEE International Solid-State Circuits Conference (ISSCC).","author":"Yamashita R.","key":"e_1_2_1_56_1","unstructured":"R. Yamashita , S. Magia , T. Higuchi , K. Yoneya , T. Yamamura , H. Mizukoshi , S. Zaitsu , M. Yamashita , S. Toyama , N. Kamae , J. Lee , S. Chen , J. Tao , W. Mak , X. Zhang , Y. Yu , Y. Utsunomiya , Y. Kato , M. Sakai , M. Matsumoto , H. Chibvongodze , N. Ookuma , H. Yabe , S. Taigor , R. Samineni , T. Kodama , Y. Kamata , Y. Namai , J. Huynh , S. E. Wang , Y. He , T. Pham , V. Saraf , A. Petkar , M. Watanabe , K. Hayashi , P. Swarnkar , H. Miwa , A. Pradhan , S. Dey , D. Dwibedy , T. Xavier , M. Balaga , S. Agarwal , S. Kulkarni , Z. Papasaheb , S. Deora , P. Hong , M. Wei , G. Balakrishnan , T. Ariki , K. Verma , C. Siau , Y. Dong , C. H. Lu , T. Miwa , and F. Moogat . 2017. 11.1 A 512Gb 3b\/cell flash memory on 64-word-line-layer BiCS technology . In 2017 IEEE International Solid-State Circuits Conference (ISSCC). R. Yamashita, S. Magia, T. Higuchi, K. Yoneya, T. Yamamura, H. Mizukoshi, S. Zaitsu, M. Yamashita, S. Toyama, N. Kamae, J. Lee, S. Chen, J. Tao, W. Mak, X. Zhang, Y. Yu, Y. Utsunomiya, Y. Kato, M. Sakai, M. Matsumoto, H. Chibvongodze, N. Ookuma, H. Yabe, S. Taigor, R. Samineni, T. Kodama, Y. Kamata, Y. Namai, J. Huynh, S. E. Wang, Y. He, T. Pham, V. Saraf, A. Petkar, M. Watanabe, K. Hayashi, P. Swarnkar, H. Miwa, A. Pradhan, S. Dey, D. Dwibedy, T. Xavier, M. Balaga, S. Agarwal, S. Kulkarni, Z. Papasaheb, S. Deora, P. Hong, M. Wei, G. Balakrishnan, T. Ariki, K. Verma, C. Siau, Y. Dong, C. H. Lu, T. Miwa, and F. Moogat. 2017. 11.1 A 512Gb 3b\/cell flash memory on 64-word-line-layer BiCS technology. In 2017 IEEE International Solid-State Circuits Conference (ISSCC)."},{"volume-title":"2014 International Conference on Smart Computing (SMARTCOMP).","author":"Yang M. C.","key":"e_1_2_1_57_1","unstructured":"M. C. Yang , Y. M. Chang , C. W. Tsao , P. C. Huang , Y. H. Chang , and T. W. Kuo . 2014. Garbage collection and wear leveling for flash memory: Past and future . In 2014 International Conference on Smart Computing (SMARTCOMP). M. C. Yang, Y. M. Chang, C. W. Tsao, P. C. Huang, Y. H. Chang, and T. W. Kuo. 2014. Garbage collection and wear leveling for flash memory: Past and future. In 2014 International Conference on Smart Computing (SMARTCOMP)."},{"volume-title":"I-CASH: Intelligently Coupled Array of SSD and HDD. In 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA).","author":"Yang Q.","key":"e_1_2_1_58_1","unstructured":"Q. Yang and J. Ren . 2011 . I-CASH: Intelligently Coupled Array of SSD and HDD. In 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA). Q. Yang and J. Ren. 2011. I-CASH: Intelligently Coupled Array of SSD and HDD. In 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA)."}],"container-title":["Proceedings of the ACM on Measurement and Analysis of Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392146","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3392146","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T22:38:49Z","timestamp":1750199929000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3392146"}},"subtitle":["A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage"],"short-title":[],"issued":{"date-parts":[[2020,6,9]]},"references-count":58,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2020,6,9]]}},"alternative-id":["10.1145\/3392146"],"URL":"https:\/\/doi.org\/10.1145\/3392146","relation":{},"ISSN":["2476-1249"],"issn-type":[{"type":"electronic","value":"2476-1249"}],"subject":[],"published":{"date-parts":[[2020,6,9]]},"assertion":[{"value":"2020-06-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}